Spectral RTL Test Generation for Gate-Level Stuck-at Faults

1. Spectral RTL Test Generation for Gate-Level Stuck-at Faults Nitin Yogi and Vishwani D. Agrawal Auburn University, Department of ECE, Auburn, AL 36849, USA ATS'06

2. Outline • Need for High Level Testing • Problem and Approach • Spectral analysis and test generation • RTL testing approach • Experimental Results • Conclusion ATS'06

3. Need for High Level Testing • Motivations for high level testing: • Reduced test generation complexity • Reduced time and cost for test development • Early resolution of testability issues • Difficulty of gate-level test generation for black box cores with known functionality ATS'06

4. Problem and Approach • The problem is … • Develop an effective RTL ATPG method • And our approach is: • Implementation-independent characterization: • RTL test generation • Spectral analysis of RTL vectors • Test generated to cover faults in gate-level implementation: • Generation of spectral vectors • Fault simulation and vector compaction ATS'06

5. Faults Modeled for an RTL Module CombinationalLogic Inputs Outputs RTL stuck-at fault sites FF FF A circuit is an interconnect of several RTL modules. ATS'06

6. Spectral Characterization of a Digital Bit-Stream w0 • Walsh functions: a complete orthogonal set of basis functions that can represent any arbitrary bit-stream. • Walsh functions form the rows of a Hadamard matrix. w1 w2 w3 Walsh functions (order 8) H8 = 1 1 1 1 1 1 1 1 1 -1 1 -1 1 -1 1 -1 1 1 -1 -1 1 1 -1 -1 1 -1 -1 1 1 -1 -1 1 1 1 1 1 -1 -1 -1 -1 1 -1 1 -1 -1 1 -1 1 1 1 -1 -1 -1 -1 1 1 1 -1 -1 1 -1 1 1 -1 w4 w5 w6 w7 Example of Hadamard matrix of order 8 time ATS'06

7. Walsh Coefficients of a Bit-Stream • A bit-stream is correlated with each row of Hadamard matrix. • Highly correlated basis functions => retained as essential components Others => noise. Bit stream to analyze Correlating with Walsh functions by multiplying with Hadamard matrix. Bit stream Spectral coeffs. Essential component (others noise) Hadamard Matrix ATS'06

8. Bit-Stream Generation • New spectrums are generated retaining essential components and adding random noise. • New spectrums are converted into bit-streams by multiplying with Hadamard matrix. • Any number of bit-streams can be generated; All contain the same essential components but differ in noise Perturbation New spectrum Original spectrum Bits changed multiplying with Hadamard matrix Essential component retained New bit-stream ATS'06

9. RTL Testing Approach (Circuit Characterization) • RTL test generation: • Test vectors generated for RTL faults (PIs, POs and inputs - outputs of RTL modules and flip-flops.) • Spectral analysis: • Test sequences for each input bit-stream are analyzed using Hadamard matrix. • Amount of perturbation is determined by a gradually increasing noise level. ATS'06

10. Power Spectrum: “Interrupt” Signal PARWAN Processor Circuit Essential components Noise components Normalized Power Randomlevel(1/128) Spectral Coefficients ATS'06

11. Power Spectrum: “Ready” Signal PARWAN Processor Circuit Examples of Essential components Normalized Power Examples of Noise components Randomlevel(1/128) Spectral Coefficients ATS'06

12. Power Spectrum: “DataIn[5]” Signal PARWAN Processor Circuit Examples of Essential components Examples of Noise components Normalized Power Randomlevel(1/128) Spectral Coefficients ATS'06

13. Power Spectrum: A Random Signal Normalized Power Averagelevel(1/128) Spectral Coefficients ATS'06

14. Selecting Minimal Vector Sequences Using ILP • Fault simulation of new sequences • A set of perturbation vector sequences {V1, V2, .. , VM} are generated. • Vector sequences are fault simulated and faults detected by each is obtained. • Compaction problem • Find minimum set of vector sequences which cover all the detected faults. • Minimize Count{V1, … ,VM} to obtain compressed seq. {V1,… ,VC} where {V1, … ,VC}{V1, … , VM}Fault Coverage{V1, … ,VC} = Fault Coverage{V1, … ,VM} • Compaction problem is formulated as an Integer Linear Program (ILP) [1]. [1] P. Drineas and Y. Makris, “Independent Test Sequence Compaction through Integer Programming," Proc. ICCD’03, pp. 380-386. ATS'06

15. Results: Circuit Characteristics • RTL Spectral ATPG technique applied to the following benchmarks: • 4 ITC’99 high level RTL circuits • 4 ISCAS’89 circuits. • PARWAN processor(Z. Navabi, VHDL: Analysis and Modeling of Digital Systems, McGraw-Hill, 1993.) • Characteristics of benchmark circuits: • ATPG for RTL faults and fault simulation performed using commercial sequential ATPG tool Mentor Graphics FlexTest. • Results obtained on Sun Ultra 5 machines with 256MB RAM. ATS'06

16. Results for b11-A** RTL characterization: RTL-ATPG results: * Sun Ultra 5, 256MB RAM ** Area-optimized synthesis in Mentor’s Leonardo ATS'06

17. b11-A Circuit ATS'06

18. PARWAN processor ATS'06

19. Results * Reset input added. ATS'06

20. Conclusion • Spectral RTL ATPG technique applied to ITC’99 andISCAS’89 benchmarks, and a processor circuit. • Vectors generated for RTL faults were spectrally analyzed and new vectors generated through perturbation. • In most cases, Spectral RTL ATPG gave similar or better test coverage in shorter CPU time as compared to sequential ATPG • Test generation using Spectral RTL ATPG brings with it the benefits of high level testing • Techniques that will enhance Spectral ATPG are: • Efficient RTL ATPG • Accurate determination and use of noise components • Better compaction algorithms ATS'06

21. Thank You ! Questions ? ATS'06