1 / 33

ECE 645 Computer Arithmetic

Lecture Roadmap. Fast Adders cont'dConditional SumParallel Prefix Network Adders. Required Reading. B. Parhami, Computer Arithmetic: Algorithms and Hardware DesignChapter 6, Carry-Lookahead Adders, Sections 6.4-6.5, pp. 98-104.Chapter 7, Variations in Fast Adders, Section 7.4-7.5, pp. 116-120.N

artie
Download Presentation

ECE 645 Computer Arithmetic

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

    1. Lecture 5: Conditional Sum, Parallel Prefix Network Adders ECE 645Computer Arithmetic 2/26/08

    2. Lecture Roadmap Fast Adders cont'd Conditional Sum Parallel Prefix Network Adders

    3. Required Reading B. Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 6, Carry-Lookahead Adders, Sections 6.4-6.5, pp. 98-104. Chapter 7, Variations in Fast Adders, Section 7.4-7.5, pp. 116-120. Note errata at: http://www.ece.ucsb.edu/~parhami/text_comp_arit.htm#errors

    4. Fast Adders ECE 645 Computer Arithmetic

    5. Solutions to Carry Propagate Problem

    6. Conditional Sum Adders

    7. Conditional Sum Adder Extension of carry-select adder Carry select adder One-level using k/2-bit adders Two-level using k/4-bit adders Three-level using k/8-bit adders Etc. Assuming k is a power of two, eventually have an extreme where there are log2k-levels using 1-bit adders This is a conditional sum adder

    8. Conditional Sum Adder: Top-Level Block for One Bit Position

    9. Three Levels of a Conditional Sum Adder

    10. 16-Bit Conditional Sum Adder Example

    11. Conditional Sum Adder Metrics

    12. Parallel Prefix Network Adders

    13. Parallel Prefix Network Adders

    14. Parallel Prefix Network Adders

    15. Properties of the carry operator

    16. Parallel Prefix Network Adders

    17. Similar to Parallel Prefix Sum Problem

    18. Parallel Prefix Sums Network I

    19. Parallel Prefix Sums Network I Cost (Area) Analysis

    20. Parallel Prefix Sums Network I Delay Analysis

    21. Parallel Prefix Sums Network II (Brent-Kung)

    22. Parallel Prefix Sums Network II Cost (Area) Analysis

    23. Parallel Prefix Sums Network II Delay Analysis

    24. 8-bit Brent-Kung Parallel Prefix Network

    25. 4-bit Brent-Kung Parallel Prefix Network

    26. 8-bit Brent-Kung Parallel Prefix Network Critical Path

    27. Critical Path

    28. Brent-Kung Parallel Prefix Graph for 16 Inputs

    29. Kogge-Stone Parallel Prefix Graph for 16 Inputs

    30. Parallel Prefix Network Adders

    31. Latency vs. Area Tradeoff

    32. Hybrid Brent-Kung/Kogge-Stone Parallel Prefix Graph for 16 Inputs

    33. Fast Adders Summary Default adder Carry-ripple Fast adders Carry lookahead: breaks carry-in to carry-out chain by having each output sum dependent on carry-in directly (and not carry-out of preceding stage) Carry select: uses duplicated hardware to pre-compute multiple outcomes, correct outcome selected Hybrid adders: a combination of two fast adder structures Conditional sum: extension of carry select using one-bit blocks Parallel prefix network: parallel network architecture to compute group propagate and group generate for each index of the adder

More Related