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Case Studies Using SST- MacSim

SST + MacSim. Case Studies Using SST- MacSim. Genie Hsieh Sandia National Labs. SST- MacSim DEMO. MacSim and DRAMSim2 integration Parallel execution of multiple MacSim. SST- MacSim : Two Modes. ./configure --prefix=/home/ myhsieh /local/ sst --with- McPAT =/home/ myhsieh /local

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Case Studies Using SST- MacSim

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  1. SST + MacSim Case Studies Using SST-MacSim Genie Hsieh Sandia National Labs

  2. SST-MacSim DEMO MacSim and DRAMSim2 integration Parallel execution of multiple MacSim

  3. SST-MacSim: Two Modes ./configure --prefix=/home/myhsieh/local/sst --with-McPAT=/home/myhsieh/local --with-hotspot=/home/myhsieh/local --with-m5=/home/myhsieh/m5-x86/ ./configure --prefix=/home/myhsieh/local/sst --with-McPAT=/home/myhsieh/local --with-hotspot=/home/myhsieh/local --with-m5=/home/myhsieh/m5-x86/ --with-dramsim=/home/mhsieh/DRAMSim2 • Standalone • ./configure <options> • make; make install • With DRAMSim2 • Build DRAMSim2 library: make libdramsim.so • ./configure <options> • --with-dramsim=DIR • make; make install

  4. MacSim + DRAMSim2 Example SST-MacSim DRAMSim2 DDR2, DDR3 <component name=gpu0 type=macsimComponent> <params> <paramPath>params_hetero_1_6</paramPath> <tracePath>trace_file_list</tracePath> <outputPath>results</outputPath> <clock>1.4Ghz</clock> </params> <link name=membus port=bus latency=1ns /> </component> <component name=mem0 type=DRAMSimC> <params> <clock> 1.5 Ghz </clock> <megsOfMemory> 1024 </megsOfMemory> <systemini> system_GDDR5.ini </systemini> <deviceini> ini/GDDR5_hynix_1Gb_16B.ini </deviceini> </params> <link name=membus port=bus latency=1ns /> </component>

  5. DEMO MacSim SST Link DRAMSim2

  6. DRAMSim2 Simulation Output [myhsieh@s910654 bin]$ ./sst.x --sdl-file=test_dram.xml SST: construct macsimComponent and setSSTComponent with ID 0 SST: construct DRAMSimC with ID 1 … src/macsim.cc:588: (I=0 C=439930): elapsed time:7.4 seconds Done DRAM: Background Energy 17202960 DRAM: Burst Energy 9973920 DRAM: ACT/PRE Energy 21178560 DRAM: Refresh Energy 1472320 Bus packet Transaction Transaction queue      1]T [Read] [0x45bbfa4]      2]T [Write] [0x55fbfa0] [5439E] Memory statistics Power     

  7. MacSim Memory Experiments Output MacSim + DDR3 <component name=mem0 type=DRAMSimC> <params> <systemini> system_DDR3.ini </systemini> <deviceini> ini/GDDR3.ini </deviceini> </params> </component> **Core 1 Core_Total Finished: insts:205888 cycles:439929 seconds:7 -- 0.47 IPC (0.47 IPC) (I=0 C=439930): finalize simulation DRAM: Background Energy 17202960 DRAM: Burst Energy 9973920 DRAM: ACT/PRE Energy 21178560 MacSim + GDDR5 <component name=mem0 type=DRAMSimC> <params> <systemini> system_GDDR5.ini </systemini> <deviceini> ini/GDDR5.ini </deviceini> </params> </component> **Core 1 Core_Total Finished: insts:205888 cycles:428507 seconds:8 -- 0.48 IPC (0.48 IPC) (I=0 C=428508): finalize simulation DRAM: Background Energy 1431920 DRAM: Burst Energy 40460 DRAM: ACT/PRE Energy 113280

  8. Parallel Execution of MacSim in SST SST-MacSim MacSim

  9. Parallel execution of MacSim through SST Bus MacSim SST Link Bus SST Link MacSim DRAMSim2 SST Link MacSim SST Link

  10. Parallel Execution of Multiple MacSim <component name=gpu0 type=macsimComponent> <params> <paramPath>params_gtx8800_v2</paramPath> <tracePath>trace_file_list_gpu</tracePath> <clock>1.4Ghz</clock> </params> <link name=gpu port=bus latency=1ns /> </component> SST-MacSim GPU SST-MacSim CPU CPU GPU <component name=bus0 type=bus> <params> <clock>1GHz</clock> <deviceList> cpugpumem</deviceList> </params> <link name=cpu port=cpu latency=1ns /> <link name=gpu port=gpu latency=1ns /> <link name=mem port=mem latency=1ns /> </component> SST-Bus Memory <component name=mem0 type=DRAMSimC> <params> <systemini> system_GDDR5.ini </systemini> <deviceini> ini/GDDR5_.ini </deviceini> </params> <link name=mem port=bus latency=1ns /> </component> SST-DRAMSim2 <component name=cpu0 type=macsimComponent> <params> <paramPath>params_x86</paramPath> <tracePath>trace_file_list_cpu</tracePath> <clock>4Ghz</clock> </params> <link name=cpu port=bus latency=1ns /> </component>

  11. DEMO

  12. Parallel Execution of Multiple MacSim <comonent name=cpu0 type=macsimComponent rank =0> </component> <comonent name=cpu1 type=macsimComponent rank =1> </component> <component name=bus type=bus rank=4> </component> <component name=dram type=DRAMSimC rank=5> </component> <comonent name=gpu0 type=macsimComponent rank =2> </component> <comonent name=gpu1 type=macsimComponent rank =3> </component> mpirun –np6 ./sst.x –sdl-file=macsim.xml

  13. Memory Experiments 1CPU 1GPU DDR3 2CPUs 2GPUs DDR3 DRAM: Background Energy 338800 DRAM: Burst Energy 2380 DRAM: ACT/PRE Energy 7080 # # Simulation times # Build time: 0.00 s # Simulation time: 124.04 s # Total time: 124.04 s DRAM: Background Energy 2569720 DRAM: Burst Energy 26180 DRAM: ACT/PRE Energy 77880 # # Simulation times # Build time: 0.00 s # Simulation time: 174.06 s # Total time: 174.06 s

  14. Parallel execution of MacSim through SST Iris Network

  15. SST/MacSim Terminal Decoupled MacSim Standalone MacSim Core Cache Core Cache SST/Iris NIC SST/Iris Router Iris NIC Iris NIC Iris Router Iris Router SST/MacSim DRAM DRAM DRAM

  16. MacSim MacSim NIC R R NIC SST Link MacSim NIC R R DRAM NIC 2X2 Mesh

  17. Configure SST/MacSim SST/MacSim DRAM SST/MacSim Terminal <component name=mc type=macsimComponent> <params> <paramPath>x86</paramPath> <terminalType>2</terminalType> <id>3</id> <mc_id>3</mc_id> <term_mclass>1</term_mclass> </params> <link name=mc2nic port=nic /> </component> <component name=cpu type=macsimComponent> <params> <paramPath>x86</paramPath> <terminalType>0</terminalType> <id>0</id> <mc_id>1</mc_id> <term_mclass>0</term_mclass> </params> <link name=cpu2nic port=nic /> </component> terminalType: 0(core), 1(cache), 2(MC/DRAM) term_mclass: 0 (request from core), 1(response from DRAM)

  18. Parallel Execution of Multiple MacSim <component name=mc type=macsimComponent> <params> <paramPath>params_gtx8800_v2</paramPath> <terminalType>2</terminalType> <id>1</id> <mc_id>1</mc_id> </params> <link name=mc2nic port=nic latency=1ns /> </component> SST-MacSim Terminal SST-MacSim DRAM cpu2nic MC2nic <component name=0.nic type=iris.ninterface> <params> <id>0</id> </params> <link name=cpu2nic port=cpu latency=1ns /> <link name=0.nic2rtr port=router latency=1ns /> </component> <component name=1.nic type=iris.ninterface> <params> <id>1</id> </params> <link name=mc2nic port=cpu latency=1ns /> <link name=1.nic2rtr port=router latency=1ns /> </component> SST-Iris NIC SST-Iris NIC nic2rtr nic2rtr <component name=0.rtr type=iris.router> <params> <id>0</id> </params> <link name=0.nic2rtr port=bus latency=1ns /> <link name=xr2r.0.0.1 port=xPos /> <link name=xr2r.0.0.0 port=xNeg/> </component> <component name=1.rtr type=iris.router> <params> <id>1</id> </params> <link name=1.nic2rtr port=bus latency=1ns /> <link name=xr2r.0.0.0 port=xPos /> <link name=xr2r.0.0.1 port=xNeg/> </component> SST-Iris Router SST-Iris Router rtr2rtr <component name=cpu0 type=macsimComponent> <params> <paramPath>params_x86</paramPath> <terminalType>0</terminalType> <id>0</id> <mc_id>1</mc_id> </params> <link name=cpu2nic port=nic latency=1ns /> </component>

  19. DEMO

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