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SPACIROC

SPACIROC. S. Ahmad , P. Barrillon, S. Blin, S. Dagoret, F. Dulucq, C. de La Taille IN2P3-OMEGA LAL Orsay, France Y. Kawasaki - RIKEN,Japan I. Hirokazu – JAXA, Japan. Overview. SPACIROC - Spatial Photomultiplier Array Counting and Integrating ReadOut Chip

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SPACIROC

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  1. SPACIROC S. Ahmad, P. Barrillon, S. Blin, S. Dagoret, F. Dulucq, C. de La Taille IN2P3-OMEGA LAL Orsay, France Y. Kawasaki - RIKEN,Japan I. Hirokazu – JAXA, Japan

  2. Overview SPACIROC - Spatial Photomultiplier Array Counting and Integrating ReadOut Chip • Readout chip for 64 channels MAPMT • Low-power & radiation hardened • Co-designed by LAL/JAXA/RIKEN • JEM-EUSO : • Extremely High Energy Cosmic Ray(EECR) observer onboard of • International Space Station • Observing extensive air shower created by the EECRs • Consortium of 12 countries led by Riken,Japan

  3. JEM–EUSO – Focal Surface Detector *EC/FEE: PDM Control Board: Cluster Control Board: FS Control Board: JEM-EUSO Data Acquisition Core Outline ~5000 MAPMTs ~300k pixels FS Control Board MPU Operation Control EC/FEE ASIC Count PDM Control Board FPGA Track Trigger Cluster Control Board DSP Fine Trigger Omega-LAL, ISAS/JAXA, RIKEN *EC: refer to P.Barillon’s talk

  4. JEM–EUSO – Front End ASIC • 64 channels photon counting • Single photon counting 100% trigger efficiency: 1/3 pe • Double pulse resolution : 10 ns • Charges to Time (Q-to-T) converters • Variable trigger pulse width • Pixels charge measurement: 13pe – 1500pe • MAPMT protection > 1500pe • Data acquisition & Readout to be done within 2.5 µs (GTU) • Readout Clock : 40MHz • Radiation hardness • Power budget : <1mW/channel

  5. SPACIROC – Design & Architecture Trig_PA VTH1 64 Anodes *Pre-Amp (adjustable gain) PhotonCounting Dataout0 Trig_FSU *Unipolar Fast Shaper Digital Counters & Readout hν MAPMT VTH2 Trig_VFS Very Fast Shaper 64 pre-amp signals Σ8 Trig_KI sum VTH3 PhotonCounting Dataout7 8-pixel-sum 8 KI (Q-to-T) KI Dataout Dynode (D12) Trig_KI dynode VTH4 *Inherited from MAROC3: refer to S.Blin’s talk

  6. SPACIROC – Design & Architecture • Photon Counting • 64 channels (pixels) – Fast triggering @100 MHz • 3 different triggers available for the 1st prototype • Trig_PA: output directly from preamplifier • Trig_FSU : Maroc3 unipolar fast shaper • Trig_VFS : new optimised fast triggering shaper • Q-to-T (based on KI02 ASIC – JAXA/RIKEN) • 8 channels : each for 8-pixel sum preamplifier signals • 1 channel : for last Dynode of MAPMT • Input dynamic range: 13pe – 1500pe (MAPMT gain 106) • Digital • Photon counting : 64 x 8-bit counter , 8 serialized outputs • Q-to-T: 8 x 7-bit counter + 1 x 8-bit counter , 1 serialized output

  7. Photon Counting - Architecture vth Input from MAPMT 64 anodes <10ns Q vth

  8. Photon Counting – Simulations • Triggers for 80 fC input charge (1/2 pe for PMT gain =106) Trig_FSU Vth=1.2v Δt<10ns Trig_PA Vth=2.35v Δt<5ns Trig_VFS Vth=1.2v Δt<5ns

  9. Photon Counting – Simulations • Triggers for 160 fC input charge (1 pe for PMT gain =106) Trig_FSU Vth=1.2v Δt<10ns Trig_PA Vth=2.35v Δt<15ns Trig_VFS Vth=1.2v Δt<5ns

  10. KI(8-Pixel-Sum/Dynode) - Architecture Current Error Adjustment Δt Vth Input from preamp(sum)/ MAPMT D12 Comparateur Charge Amp Trigger KI Vth Impedance Conversion Baseline stabilisation at no signal Offset Adjustment Q Δt Current Sink DC Feedback Activated for large signal Activated for small signal

  11. KI 8-Pixel-Sum – Simulations • Input : 2.4pC – 240pC 2.4pC 11pC 52pC 240pC

  12. KI Dynode – Simulations • Input : 16pC – 250pC 16pC 94pC 172pC 250pC

  13. SPACIROC – Analog Design • Consumption • All functionalities could be turn off to minimize consumption • Estimation without digital part: • Trig _PA: 0.32mW/ch (Vdda=3V) • Trig_VFS:0.53mW/ch (Vdda=3V) • Trig_FSU: 0.59mW/ch (Vdda=3V) • KI Sum: 0.47mW/ch (Vdda=3V) • KI Dynode: 0.56mW/ch (Vdda=3V) • Trigger from preamplifier (Trig_PA) • Fast preamplifier pulse • Counting rate close to 100MHz • Not a lot of gain • Difficulties to trig down to 80fC • Trigger from Maroc3 chip (Trig_FSU) • More gain • Trig down to 40fC (1/2 pe if PMT gain=5.105) • Difficulties to have a counting rate up to 100MHz • New Trigger (Trig_VFS) • Counting rate could be 100 MHz • Trig down to 40fC • KI • Could trigger for the whole dynamique range (2.4pC – 250pC) in GTU < 1mW/ch

  14. SPACIROC – Digital Overview 8 x digital module for PhotonCounting 1 x digital module for KI 9 x Serialized Data Out line DataOut 8 x 8-bit counter 8 x 7-bit counter + 1 x 8-bit counter DataOut • Power Consumption: • Photon Counting : 0.105 mW/ch – 0.585 mw/ch • KI: 0.175 mW/ch – 0.233 mW/ch 14 14

  15. SPACIROC – Slow Control Cell • Slow control cell: • 1 Scan DFF + triple Data latch • Majority voter • Bit error detection • Non-destructive data readout • Bigger layout : SEL protection,... Layout Bascule DFF 16µm Layout Slow Control Cell Spaciroc 32µm 18µm 114µm

  16. SPACIROC – Status Submitted in March 2010 Technology: AMS 0.35µm SiGe Dimensions : 4.6mm x 4.1mm (19 mm²) Power supply: 0-3V Packaging : CQFP240 (proto) FPBGA144(*EC board) 4.6mm • Chip arrival: Mid-July • Test: September • BGA packaging : December 4.1mm *EC: refer to P.Barillon’s talk 16

  17. Thank you for listening !

  18. SPACIROC – Schematic • Specifications: • Consumption: 1mW/channel • Photon counting: 100%trigger efficiency 1/3pe • Counting rate can be at 100MHz • KI input range : 13pe - 1500pe • Radiation hardness • Data out : Startbit + 64 bits + Parity 18

  19. SPACIROC – Power Consumption • Power dissipation per channel for each analog part including bias & dac: • Photon Counting • Trig_PA : 0.32 mW/ch • VFS : 0.53 mW/ch • FSU : 0.59 mW/ch • KI Sum : 0.47 mW/ch • KI Dynode : 0.56 mW/ch • These values came from simulations, measured values from the chip will be slightly different. • For 36MHz photoelectron signal arriving at one PMT, estimated power consumption for Digital-PC is about 0.2621mW/ch. For Digital-KI, power consumption will depend on the input charge. 19

  20. SPACIROC - Schedule July April June May 2010 Test Board Schematic Test CAD Assembly Firmware Labview September 2010: 144 pin BGA packaging EC board

  21. Photon Counting – Schematic

  22. KI 8-Pixel-Sum – Schematic

  23. KI Dynode – Schematic

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