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Exception Handler’s

Exception Handler’s. CS215 Lecture 21. Hardware Support. With the instructions and design of the MIPS R32 architecture that we have seen so far, there is no way to build a kernel. We have to have some way to get from the user code to the kernel code.

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Exception Handler’s

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  1. Exception Handler’s CS215 Lecture 21

  2. Hardware Support • With the instructions and design of the MIPS R32 architecture that we have seen so far, there is no way to build a kernel. • We have to have some way to get from the user code to the kernel code. • Once in kernel code, we have to be able to figure out why we are in the kernel and take care of any issues before returning.

  3. Co-Processor 0 • The hardware support for the operating system comes from a module called co-processor 0. (Co-processor 1 is the FPU) • This special processor contains registers which can be read from and written to. • We can understand what needs to be done by reading these registers • We can change conditions by writing to these registers

  4. Main Memory Co-Processor 0 32 special registers mfc0, mtc0 instructions when exception occurs the info is placed in the c0 registers and control is transferred to the kernel lw and swinstructions Standard CPU 32 registers $0 - $31 Co-Processor 1 Floating Point Unit 32 FPU registers instructions such as add.s, mul.s, etc. mfc1, mtc1 instructions

  5. Memory Main Memory starts at 0 an goes to 0x80000000 System stack is located at 0x7FFFEFFC and grows toward 0 Kernel Memory starts at 0x80000000 and goes to 0xFFFFFFFF The Exception handler/kernel must be placed at 0x80000180 for R32

  6. Cause Register - $13 8-15 28-29 16-27 7 2-6 31 30 0-1 BD – Branch Delay indicates whether the last exception was taken while executing in a branch delay slot CE – Coprocessor Error indicates the coprocessor unit number referenced when a coprocessor unusable exception is taken IP – Interrupt Pending indicated which external, internal, coprocessor and software interrupts are pending. Field reflects the current status. ExcCode – Exception Code…

  7. Exception Codes • 0 – Interrupt • 4 – Address error (fetch or load) • 5 – Address error (store) • 8 – Syscall exception • 9 – Breakpoint exception • 12 – Arithmetic overflow exception • 13 – Trap exception

  8. Exception Program Counter - $14 • When we use jal, the return address is stored for us. When an exception happens, the address of that exception must be stored. • The hardware mechanism stores the offending instruction address into the EPC. • NOTE – we must explicitly increment this to the next address before leaving the kernel

  9. Other C0 registers • Context • Error • BadVAddr • Status • Config • ECC • CacheError

  10. new TAL commands • mfc0 rt, c0rd – move from c0rd to rt • mtc0 rt, c0rd – move from rt to c0rd • eret – this instruction returns the kernel to the user program by going to the location held in the EPC • .kdata – tells assembler to place variables in kernel section of memory • .ktext – tells assembler to place code in kernel section of memory

  11. Kernel • The exception handler must be located at 0x80000180. • We can do that by the following:.ktext 0x80000180 • The kernel starts executing at that address and from there must determine the issue and resolve it. • We can use $k0 and $k1 without saving them. We cannot use the system stack

  12. Syscall Issue • The spim simulator grabs the syscall (ExcCode 8) exceptions and thus the kernel never receives them. • For that reason, we will invoke the kernel by using a trap instruction:teq $0, $0 • This will get us in the kernel and let us still use syscall for getting and putting chars.

  13. SPIM • To get spim to load your exception file on grid, use the following command:spim7 –ef your_excpt_file

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