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Kuliah Rangkaian Digital Kuliah 7: Unit Aritmatika. Teknik Komputer Universitas Gunadarma. Topic #7 – Arithmetic Units. Comparator Adders Half-adder & Full-adder Carry-ripple adder & carry-look-ahead adder Overflow detection Subtractor Multiplier. (Equality) Comparators (using XOR).
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Kuliah Rangkaian Digital Kuliah 7: Unit Aritmatika Teknik Komputer Universitas Gunadarma
Topic #7 – Arithmetic Units • Comparator • Adders • Half-adder & Full-adder • Carry-ripple adder & carry-look-ahead adder • Overflow detection • Subtractor • Multiplier
(Equality) Comparators (using XOR) • 1-bit comparator • 4-bit comparator
Outputs Inputs X 0 0 1 1 Y 0 1 0 1 S 0 1 1 0 Cout 0 0 0 1 X Y S Cout Half adder • Adds two 1-bit input to produce a sum and a carry-out • Does not account for carry-in S = X’·Y + X·Y = XY Cout = X·Y
X Y Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Full adder • Building block to realize binary arithmetic operations • 1-bit-wide adder with carry-in, produces sum and carry-out • Truth table:
S X X XY XY 00 01 11 10 00 01 11 10 Cin Cin 1 1 6 6 0 0 2 2 4 4 0 1 0 1 1 1 3 3 5 5 7 7 1 1 Cin Cin Cout Y Y 1 1 1 1 Designing full adder S = X’·Y’·(Cin) + X·Y’·(Cin)’ + X·Y’·(Cin)’ + X·Y·(Cin) = X Å Y Å(Cin) Cout = XY + X(Cin) + Y(Cin)
X’ X’Y’C-in Y’ C-in X Y X Y X’ Sum S X’YC-in’ X Y X’ Y’ Y C-in’ Full Adder C-out C-in X C-in Y C-in C-in’ C-in’ XY’C-in’ X S Y XYC-in C-in’ X XY Y X XC-in C-out C-in Y YC-in C-in Alternative: full adder using AND-OR
Ripple adder • Speed limited by carry chain • 2 per full adder 2n for an n-bit adder • Approach: eliminate or reduce carry chain • Carry look-ahead: compute Cin directly from external inputs Q: Do we need C4 for a 4-bit 2’s complement addition?
Carry look-ahead adder • Let Ci+1 = (Xi·Yi)+ (Xi+Yi)· Ci = Gi + Pi · Ci • For a 4-bit adder … C1 = G0 + P0·C0 C2 = G1 + P1·C1 = G1 + P1·G0 + P1·P0·C0 C3 = G2 + P2·G1 + P2·P1·G0 + P2·P1·P0·C0 C4 = G3 + P3·G2 + P3·P2·G1 + P3·P2·P1·G0 + P3·P2·P1·P0·C0 where Gi = Xi · Yi Pi = Xi + Yi • This is a 3 level circuit including generating the Gs and Ps • Rule of thumb: one carry look-ahead circuit every 4-bit
Carry look-ahead circuit Gs and Ps are also useful for generating the sums
16-bit carry ripple adder
16-bit carry look-ahead adder
Y3 Y2 Y1 Y0 X3 X2 X1 X0 4-bit Adder C4 C0 = 1 C-out C-in S3 S2 S1 S0 D3 D2 D1 D0 Subtraction • Recall our discussion on subtraction for 2’s complement … • X – Y = X + Y + 1 • Invert all bits of Y and set Cin to 1 • Example: 4-bit subtractor using 4-bit adder • Add a control circuit in ALU s.t. same circuit can be used for both addition and subtraction
Multipliers • 8x8 multiplier