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N ame of University - Class Title. Introduction To Embedded System Design. Embedded Systems Architecture : A Comprehensive Guide for Engineers and Programmers - An Elsevier Science Publication. Overview. What is an Embedded System? Embedded Systems Design
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Name of University - Class Title Introduction To Embedded System Design Embedded Systems Architecture : A Comprehensive Guide for Engineers and Programmers - An Elsevier Science Publication
Overview • What is an Embedded System? • Embedded Systems Design • Embedded Systems Design & Development Lifecycle Model • What is an Embedded Systems Architecture? • The 6 Stages of Creating an Embedded Architecture. • Stage 1 : Have a Strong Foundation • Know Your Standards • Embedded Software • Putting It All Together • Stages 2-6 of Creating an Architecture
What Is An Embedded System ? • A type of computer system. • Some of the Most Common Traditional Definitions : • Embedded systems are more limited in hardware and/or software functionality then the PC. • An embedded system is designed to perform a dedicated function • … • Why don’t these definitions entirely apply, today?
What is an Embedded System [Continued]? • Automotive • i.e. : Ignition Systems, Engine Control, Antilock Braking System, … • Consumer Electronics • i.e. : TVs, STBs, appliances, toys, automobiles, cell phones … • Industrial Control • i.e. : robotics, control systems… • Medical • i.e. : Infusion Pumps, Dialysis Machines, Prosthetic Devices,Cardiac Monitors, … • Networking • i.e. : routers, hubs, gateways, … • Office Automation • i.e. : fax machines, photocopiers, printers, monitors, … ** Aside from being types of computer systems, there is no single definition or characterization of embedded systems reflecting them all. **
Embedded Systems Design Phase 1 : Creating The Architecture Embedded Systems Design and Development Lifecycle Model Product Concept Phase 2 : Implementing the Architecture Preliminary Requirements Analysis Creation of Architecture Design Phase 3 : Testing the System Phase 4 : Maintaining the System Develop Version of Architecture Deliver Final Version of Architecture Incorporate Feedback Deliver Version of Architecture Develop [Implement] the System Review & Obtain Feedback Incorporate Feedback Review and Test the System Deliver & Maintain the System
What is Embedded Systems Architecture? • An abstraction of the embedded device that represents the embedded system as some combination of interacting elements. - physically represented as structures - many types of structures • Layered, Kernel, Decomposition, Client/Server, Process, … Sum of Structures = Embedded Architecture • Why care about the architecture of an embedded system?
6 Stages of Creating an Embedded Architecture • Many industry popular methodologies for creating architectures (adaptable to embedded systems) • Rational Unified Process (RUP), Attribute Driven Design (ADD), Object Oriented Process (OOP), … • More Pragmatic Approach [the best of all worlds] • Stage 1 : Having a Solid Technical Base • Stage 2 : Understanding the ABCs of Embedded Systems • Stage 3 : Defining the Architectural Patterns & Reference Models • Stage 4 : Creating the Architectural Structures • Stage 5 : Documenting the Architecture • Stage 6 : Analyzing & Evaluating the Architecture
Stanford University - EE109 Stage 1 : Having a Strong Technical Base
Application Layer System Software Layer Hardware Layer Embedded Systems Model Embedded System
Application Layer Camera Application ... User Interface System Layer USB Drivers Interrupt Drivers Memory Management Drivers ... Hardware Cypress EZ-USB FX-2 Xilinix FPGA 16 MB DRAM .... EE109 Platform and the Embedded Systems Model
General Purpose Standards MarketSpecific Standards Application Software Layer PJava J2ME SSL128 … Ethernet TCP/IP HTTP … MHP ATSC DTV HAVi FDA … System Software Layer Hardware Layer Know Your Standards • Market Specific • Consumer Electronics, Medical, Industrial Automation & Control, Networking & Communications, Automotive, Aerospace & Defense, Office Automation, … • General Purpose • Networking, Programming Language, Security, Quality Assurance, …
Host [Development System] Target [Embedded System] Application Layer Preprocessor Compiler Linker … Application Layer System Software Layer System Software Layer Hardware Layer Hardware Layer How can a Programming Language Spec Add to An Embedded System’s Architecture ? • Translating Code • Interpretation, Just-in-Time (JIT), Way-Ahead-of-Time (WAT)/Ahead-of-Time (AOT) • Garbage Collection • Copying, Mark&Sweep, Generational, …
C Source File (s) C Compiler C Header File (s) Preprocessing Host Computer Compiling C Object File (s) Linker C System Libraries C Executable File Embedded System Translation of Code on Host : Compiling
Source L1 Source L2 Source L3 Source L4 Source L5 Source L6 Target Code for Source L1 Target Code for Source L2 Target Code for Source L3 …………. Byte Code 1 Parsing Byte Code 1 Parsing & Interpreting Byte Code 1 Interpreting Byte Code 1 JIT Compiling Interpretation Translation of Code on Target vtab Byte Code 1 Interpretation Source File (s) Byte Code 2 Byte Code 2 Parsing Byte Code 3 Byte Code 2 Interpreting Host Compiler …. Byte Code File (s) … Way-Ahead-of-Time/Ahead-Of-Time [WAT/AOT] 1 vtab .class File JVM WAT Compiler Byte Code 1 Compiled Byte Code 1 Byte Code 1 object File Byte Code 2 Parsing & Interpreting Byte Code 2 Compiled Byte Code 2 Byte Code 2 2 Just-In-Time [JIT] JVM Linker Byte Code 3 Compiled Byte Code 3 Byte Code 3 Byte Code 2 JIT Compiling Runtime Libraries …. … …. executables … 2nd and Additional Passes of Processing Byte Code First Pass of Processing Byte Code
Memory Before GC Memory After GC Copying Garbage Collector Object 1 Object 1 Object 2 Object 2 Object 3 Object 4 Object 4 Garbage Collection : Copying
Memory Before GC Memory After GC Object 1 Object 1 Mark & Sweep Garbage Collector Object 2 Object 2 [Mark] Object 3 [Sweep] Object 4 Object 4 Garbage Collection : Mark&Sweep
Youngest Generation [Nursery] Copying GC Copying Garbage Collector Memory Before GC Memory After GC Object 1 Object 1 Object 2 Object 2 Object 3 Object 4 Object 4 Garbage Collection : Generational Older Generation Mark (Sweep) & Compact GC Memory Before GC Memory After GC Mark & Sweep Mark,Sweep, & Compact Garbage Collector Object 1 Object 1 [Mark] Object 2 Object 2 Object 3 [Sweep] Object 4 Object 4 Memory After GC Compaction [Compact] Object 1 Object 2 Object 4
Application Layer System Software Layer Application Layer Java Device Drivers System Software Layer JVM Hardware Layer Hardware Layer Java Processor JVM part of System layer i.e. : Skelmir’s Cee-J, Esmertec/Insignia’s Jeode and Jbed, Tao’s Intent, Kava’s KavaVM … JVM in Hardware i.e. : ARM’s Gazzelle, AJile’s aj100,… Application Layer JVM System Software Layer Hardware Layer JVM compiled in application i.e. Esmertec’s Jbed, Kava’s KavaVM, IBM’s J9 … How can Java Add to An Embedded System’s Architecture ? • Embedded Java • Standards (pJava, J2ME, Embedded Java, …) • Processing Bytecode (Interpretation, JIT, WAT/AOT) • Garbage Collection (Copying, Mark&Sweep, …)
Application Layer MSIL Application System Software Layer .NET Compact Framework Class Loader BCL/Platform Extension Libraries CLR GC [JIT] Execution Engine Hardware Layer Memory How can .NetCE Add to An Embedded System’s Architecture ? • .NetCE Compact Framework • Standard = Common Language Specification • Processing Bytecode (Interpretation/JIT) • Garbage Collection ( Generational)
Application Software Layer Browser SSL 128 Bit Encryption Java Script HTTP HTML4.0 Real Audio DOM 0 CSS 1 … System Software Layer Hardware Layer How can Scripting Languages Add to An Embedded System’s Architecture ? • Scripting Languages • Perl, JavaScript, HTML, … • Processing Bytecode (Interpretation)
Network 1 – Peer-to-Peer Architecture Network 2 – Client/Server Architecture Transmission Medium Device C Server Client C Networking Components Networking Components Networking Components Device A Client A Networking Components Networking Components Device B Client B Distance Networking Components Networking Components Network ‘s Overall Structure How can Networking Add to an Embedded System’s Architecture ?
OSI Model Application Software Layer Application Layer Presentation Layer Session Layer System Software Layer Transport Layer Network Layer Data-Link Layer Hardware Layer Physical Layer Open Systems Interconnection (OSI) Model
Data Header 1 Data Header 3 Data Header 2 Data Header 4 Data Data Header 5 Data Networking Layers Application Layer Application Layer Layer 7 Layer 7 Application Presentation Session Transport Network Data Link Physical Presentation Layer Presentation Layer Session Layer Session Layer Transport Layer Transport Layer Network Layer Network Layer Data Link Layer Data Link Layer Layer 1 Layer 1 Physical Layer Physical Layer Transmission Medium
TCP/IP Model OSI Model Application Software Layer Application Layer Application Layer Presentation Layer Session Layer System Software Layer Transport Layer Transport Layer Network Layer Internet Layer Data-Link Layer Network Access Layer Hardware Layer Physical Layer OSI and Real-World Networking Models : TCP/IP
OSI Model WAP Model Application Software Layer Application Layer Application Layer Session Layer Presentation Layer Transaction Layer Session Layer Security Layer System Software Layer Transport Layer Transport Layer Network Layer Data-Link Layer Hardware Layer Physical Layer OSI and Real-World Networking Models : WAP
Bluetooth Model OSI Model Application Software Layer Application Layer Application Protocol Group Presentation Layer WAP Session Layer System Software Layer Middleware Protocol Group Transport Layer TCP/IP Network Layer Transport Protocol Group Data-Link Layer Hardware Layer Physical Layer OSI and Real-World Networking Models : Bluetooth
Application Software Layer System Software Layer Hardware Layer LAN WAN Wireless Wired Wireless Wired IEEE802.11 Wireless Radio & IR IEEE 802.3 Ethernet CDMA EIA/TIA 232 (RS-232) IEEE 802.5 Token Ring TDMA ATM (SONET,…) Bluetooth Radio and Broadband ARCnet TDMA EIA/TIA 449 (RS-449) … FDDI GPRS X.21 … GSM EIA/TIA 232 (RS-232) CPDP … … OSI Layer 1 : Physical Layer
Physical Layer Processing Device 1 Device 2 Layer 2 Data Link Layer Data Link Layer Layer 2 1001110101110 0111010111001 Transmission Medium Layer 1 Physical Layer Physical Layer Layer 1
OSI Layer 2 : Data-Link Layer Application Software Layer System Software Layer LAN WAN Wireless Wired Wireless Wired NS X.25 PSTN LAPB IEEE802.2 LLC/SNAP IEEE 802.2 LLC/SNAP BSSGP PPP IEEE802.11 MAC IEEE 802.3 Ethernet HDLC PPP SLIP Bluetooth LMP, L2CAP, Baseband … ARCnet RFCOMM ATM FDDI … … IEEE 802.5 Token Ring … … Hardware Layer Physical Layer
Data-link Layer Processing Network Layer Layer 3 Datagram Data Link Layer [data] Data-link Headers Stripped Data-Link Headers Appended to Data Field Layer 2 110110101101110111011101110001100111000001100101000111 DataLink Frame [Start of frame] [source addr][dest addr][admin][data] [ error chk][end of frame] 11101110001101 Physical Layer Layer 1
Application Software Layer System Software Layer TCP/IP Stack Banyan/VINES OSPF ICMP RIP BGP … RTP ICP … IP VIP GPRS SCCP BSSAP BSSMAP ISDN …. Data-link Layer Hardware Layer Physical Layer OSI Layer 3 : Network Layer
Transport Layer Layer 4 Packet Network Layer [data] Layer 3 Network Headers Stripped Network Header Appended to Data Field 11011011001101110001100001101101110111011101110001100111000001100101000111 Network Datagram [IP Version] [header len][data type][data len][frag info] [# hops][upper layer][checksum][source IP][dest IP][data] Datagram Data-link Layer Layer 2 Network Layer Processing
Application Software Layer System Software Layer TCP/IP Stack GSM WAP TCP UDP … BSSMAP DTAP … WDP … Network Layer Data-link Layer Hardware Layer Physical Layer OSI Layer 4 : Transport Layer
Session Layer Layer 5 Message/Pscket Transport Layer [data] Layer 4 Transport Headers Stripped Transport Header Appended to Data Field 11011011001101110001100001101101110111011101110001100111000001100101000111 TCP Packet [Src Port][Dest Port][Seq #][Ack #][H Len][Res][Uflag][Pflag][Rflag][Sflag][Fflag][WinSz][Chksum][UP[O] [Data] Packet Layer 3 Network Layer Transport Layer Processing
System Software Layer Transport Layer Network Layer Data-link Layer Hardware Layer Physical Layer OSI Layer 5 : Session Layer Application Software Layer WAP Stack TCP/IP Stack … WSP … DNS NFS …
Session Layer Processing Presentation Layer Layer 6 Message Session Layer [data] Layer 5 Session Headers Stripped Session Header Appended to Data Field 1101101100110111000110000110 L2CAP Packet [Length][Destination Channel ID][Data] Message/Packet Transport Layer Layer 4
Application Software Layer JPEG MIDI SSL MPEG … Session Layer System Software Layer Transport Layer Network Layer Data-link Layer Hardware Layer Physical Layer OSI Layer 6 : Presentation Layer
Presentation Layer Processing Application Layer Layer 7 Message Presentation Layer [data] Message conversion Layer 6 Presentation Header Appended to Data Field 1101101100110111000110000110 Bluetooth Message [Length][Destination Channel ID][Data] Message Session Layer Layer 5
Application Software Layer MIME SMTP FTP Telnet NCP APPC BT-SDP NFS POP3 IMAP4 Finger HTTP Bootp SNMP RLOGIN … Presentation Layer Session Layer System Software Layer Transport Layer Network Layer Data-link Layer Hardware Layer Physical Layer OSI Layer 7 : Application Layer
Stanford University - EE109 Embedded Hardware
Architecture Processor Manufacturer AMD Au1xxx Advanced Micro Devices,… ARM ARM7, ARM9, … ARM, … C16X C167CS, C165H, C164CI,… Infineon,… ColdFire 5282, 5272, 5307, 5407, … Motorola,… I960 I960 Vmetro, … M32/R 32170, 32180, 32182, 32192, … Renesas/Mitsubishi, … M Core MMC2113, MMC2114, … Motorola MIPS32 R3K, R4K, 5K, 16, … MTI4kx, IDT, MIPS Technologies, … NEC Vr55xx, Vr54xx, Vr41xx NEC Corporation, … PowerPC (PPC) 82xx, 74xx,8xx,7xx,6xx,5xx,4xx IBM, Motorola,… 68k 680x0 (68K, 68030, 68040, 68060,…) ,683xx Motorola, … SuperH (SH) SH3 (7702,7707, 7708,7709), SH4 (7750) Hitachi, … SHARC SHARC Analog Devices, Transtech DSP, Radstone, … strongARM strongARM Intel, … SPARC UltraSPARC II Sun Microsystems, … TMS320C6xxx TMS320C6xxx Texas Instruments, … x86 X86 [386,486,Pentium (II, III, IV)…] Intel, Transmeta, National Semiconductor, Atlas, … TriCore TriCore1, TriCore2, … Infineon,… … … … Many ManyMany Embedded Processors To Choose From
ISA Models • Application Specific • Controller • Datapath • Finite State Machine with Datapath [FSMD] • Java Virtual Machine • …. • General Purpose • Complex Instruction Set Computing [CISC] • Reduced Instruction Set Computing [RISC] • Instruction Level Parallelism • Single Instruction Multiple Data [SIMD] • Superscaler Machine • Very Long Instruction Word (VLIW) Computing • ….
embedded system board Master Processor CPU controls usage and manipulation of data Memory Output Input 5 system components commonly connected via buses data from cpu or input devices stored in memory until a cpu or output device request Memory brings data into theembedded system Input Output gets data out of theembedded system Implementing an ISA & Von-Neumann
Stanford University - EE109 Embedded Software
Application Software Layer System Software Layer Application Software Layer Middleware Layer System Software Layer Device Driver Layer Device Driver Layer Hardware Layer Hardware Layer Embedded Software : The System Software Layer Application Software Layer Application Software Layer System Software Layer System Software Layer Application Software Layer System Software Layer Operating System Layer Middleware Layer Operating System Layer Board Support Package Layer Operating System Layer Device Driver Layer Device Drivers Device Driver Layer Hardware Layer Hardware Layer Hardware Layer Application Software Layer Application Software Layer Application Software Layer Application Software Layer System Software Layer System Software Layer System Software Layer System Software Layer Operating System Layer Middleware Layer ………… Middleware Operating System Layer Operating System Layer Operating System Layer Middleware Middleware Board Support Package Layer Board Support Package Layer Device Drivers Device Drivers Device Drivers Device Driver Layer Hardware Layer Hardware Layer Hardware Layer Hardware Layer
Higher-layer Interface Hardware Interface Application Layer System Software Layer Device Drivers Ethernet (SCC1) RS-232 (SMC2) PCMCIA DMA (IDMA) Interrupts T1/E1 (TDM) MMU Timers ISDN (TDM) I2C … … L1 Cache … Hardware Layer I/O Buses Memory … Generic (Architecture and Board Specific Driver) Architecture Specific Device Drivers What are Device Drivers? Application Software Layer System Software Layer Device Driver Layer r Higher-layer Interface ----------------------- Hardware Interface Hardware Layer
Most Common Types of Device Drivers Routines • Hardware Startup, initialization of the hardware upon power-on or reset. • Hardware Shutdown, configuring hardware into its power-off state. • Hardware Disable, allowing other software to disable hardware on-the-fly. • Hardware Enable, allowing other software to enable hardware on-the-fly. • Hardware Acquire, allowing other software gain singular (locking) access to hardware. • Hardware Release, allowing other software to free (unlock) hardware. • Hardware Read, allowing other software to read data from hardware • Hardware Write, allowing other software to write data to hardware • Hardware Install, allowing other software to install new hardware on-the-fly • Hardware Uninstall, allowing other software to remove installed hardware on-the-fly
Embedded OS Middleware (optional) Kernel Process Management Memory Management Interrupt/Error Handling I/O System Management Security System Management Device Drivers (Optional) Embedded Operating Systems • Process Management. • Process Implementation • Scheduling • Intertask Communication & Synchronization • Interrupt Handling, Error Detection, … • … • Memory Management. • Segmentation • Paging • Virtual Memory • System Security • … • I/O System Management. • File System • …
Layered OS The Operator Layer 5 Layer 4 Layer 3 Layer 2 Layer 1 Layer 0 User Program Input/Output Management Operator Process Communication Higher-level Software (Middleware, Applications) Memory & Drum Management Processor Allocation and Multiprogramming Monolithic Kernel file I/O Memory Management Process Management I/O Drivers Memory Drivers Interrupt Drivers Hardware OS Models Higher-level Software (Middleware, Applications) Microkernel Memory Management Process Management Device Drivers I/O Memory Interrupt Hardware
OS Task Program 1 Task Registers Task Stack Program 1 Thread 1 Program 1 Thread 1 Registers Task 1 Program 1 Task 1 Registers Task 1 Stack Program 1 Memory Thread 2 Program 2 Thread 2 Registers OS (ie:..) Program 2 Task 2 Program 1 Task 2 Registers Task 2 Stack Thread 3 Program 3 Thread 3 Registers … Task 3 Program 2 Task 3 Registers Task 3 Stack Process Management • What is a process? • Tasks vs. Threads