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Implementation of Load Byte in DataPath. Eyaad Allam CST 364. Overview. Block Analysis Verilog Module Level Analysis Results Conclusion. Block Analysis: Load Byte Instruction Flow. Block Analysis Additional Hardware Needed for Write Back. Verilog Module Analysis.
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Implementation of Load Byte in DataPath EyaadAllam CST 364
Overview • Block Analysis • Verilog Module Level Analysis • Results • Conclusion
Verilog Module Analysis • maindec.v: module that translate instruction code to the ALU • OPCode for Load Byte Syntax: lb $rt, offset($rs)
Verilog Module AnalysisNormal Sign Extend • signext.v
Verilog Module AnalysisByte Select and Byte Sign Extend • Byte_Select_SignExtend.v
Verilog Module AnalysisUpdated Datapath • datapath.v
Verilog Module AnalysisInstruction Set Load word add sub Load byte
Conclusion • Byte is a frequently used data type in higher level languages (Ex. C, Java) • Ability to load a specific byte whether word aligned or not in a single instruction can improve a system's performance by reducing 3 instruction calls into 1 instruction.