ENGG3190 Logic Synthesis “Multi Level Logic” (Part II)

1. ENGG3190Logic Synthesis“Multi Level Logic”(Part II) Winter 2014 S. Areibi School of Engineering University of Guelph

2. Outline • Implicit Don’t Cares • How they arise due to structure • Types and flavors of Don’t Cares • Satisfiability Don’t Cares • Controllability Don’t Cares • Observability Don’t Cares • Summary

3. Logic Optimization Two-level logic (PLA) Multi-level logic (standard cells) Heuristic (espresso) Exact (QM) Boolean Functional (BDD-based) Structural (SIS) Functional (AC, Kurtis) algebraic Logic Optimization methods Boolean

4. MLS: Implicit Don’t Cares • Don’t cares in basic logic design. • 1,0 x (allow more flexibility) • MLLS don’t care arise naturally and implicitly. • Don’t cares  Rich source of optimization

5. Using the Algebraic model we lose some means of expressing the network. • In MLS don’t cares are called “implicit” because they happen naturally. • What computational procedure can we use to hunt for the don’t cares?

6. What do we know so far about don’t cares? • We are free to treat the x or ‘d’ as a ‘0’ or a ‘1’ • What is different in Multi-Level Optimization?

8. If X, b, y are primary inputs then we cannot say anything yet! • However, If X, b, y are produced by other parts of the network then we might!

9. X is not a primary input. It is computed inside a previous node. • Now the answer is YES we can say something about impossible patterns. Why?

10. There are some impossible patterns: • What are the patterns? When can they occur?

11. What are the possible patterns that can occur? Recall X=a.b?

12. These are obvious. What about remaining patterns?

14. We are not actually interested in patterns of a, b, X but interested in the patterns X, b, Y. • How can we take the a, b, X patterns and determine if X, b, Y can occur? • How can we do this computationally?

15. By looking at the Table on the LHS it is clear that some X, b, patterns can happen while others DO NOT!

17. The impossible patterns will change the contents of the K-Map!!

18. So now we can further optimize the f=Xb +bY + XY in the K-Map by including the don’t cares.

19. F = X + bY F = X + bY

20. Again we ask if there impossible values for Y given b and c.

28. These don’t cares are called: • Satisfiability Don’t Cares. • Controllability Don’t Cares

29. MLS: Implicit Don’t Cares … • Any other structures that would give rise to Don’t Care Conditions? • What happens if the nodes preceding a Boolean network are not Primary inputs (i.e., another Node?)  Previous slides • Satisfiability Don’t Cares. • Controllability Don’t Cares • What happens if the nodes in front of a Boolean network is not a Primary output (i.e., another Node?) • Other types of Don’t Cares??

30. Previously we showed the affect of inputs on F and consequences of getting Don’t Cares (nodes preceding F) • How about the new Node Z = f.X.d (behind node f) • When does the value of node f affect the primary outputs? • When does Z not care about f?

31. Note that the table is not in order of Boolean order! • For the set X=0, d=0, does the value of f have any affect?

33. Where is this leading to??

35. Z is not affected by f(X,b,Y) when X=0, b=-, Y=- 0 - - Can we use this information to further simplify f??

37. f = 1 • So what does the new network look like?

38. Implicit Don’t Cares are very useful to optimize a multi-level logic network!!

40. MLS: Satisfiability Don’t Cares … • Different Typesand flavors of Don’t Cares: • Observability • Controllability • Satisfiability • What do they tell us? • Are they easy to extract? • Can we compute them automatically?

42. Representing DC Patterns … • How will we represent don’t care (DC) patterns at a node? • As a Boolean function that makes a 1 when the pattern is impossible • This is often called a Don’t Care Cover • So, each SDC, CDC, ODC is really just another Boolean function • Why do it like this? • Because the math works (!) • But more importantly: we can use all the other computational Boolean algebra techniques we learnt (eg, BDDs), to solve for, and manipulate the DC patterns. • This turns out to be hugely important to making this practical.

43. What is a computational recipe to represent SDCx, SDCy, …? • SDC is a representation of impossible patterns. • SDCx(X,a,b) represents the wire (output of upper function)

44. RECALL gate consistency functions We will use the complement of gate consistency

46. Anything that makes this function a 1 is an impossible pattern for node X !!

47. 1 1 1 0

48. SDCs: Summary … • SDCs are associated with every internal wire in the Boolean Logic Network • SDCs explain impossible patterns of input to, and output of, each node. • SDCs are easy to compute!! • But SDCs alone are not the Don’t Cares used to simplify nodes • We use SDCsto build CDCs, which give impossible patterns at input nodes

49. MLS: Controllability Don’t Cares … • Controllability Don’t Cares are: • Patterns that cannot happen at inputs of a network. • Computing Controllability Don’t Cares (CDC). • Detailed Example.

50. Can Compute to Simplify Boolean Networks