Introduction to Silicon Programming in the Tangram/Haste language

1. Introduction to Silicon Programmingin the Tangram/Haste language Material adapted from lectures by: Prof.dr.ir Kees van Berkel [Dr. Johan Lukkien] [Dr.ir. Ad Peeters] at the Technical University of Eindhoven, the Netherlands

2. Handshake protocol • Handshake between active and passive partner • Communication is by means of alternating request (from active to passive) and acknowledge (from passive to active) signals • Active: send request, then wait for acknowledge • Passive: wait for request, then send acknowledge Active Passive

3. Sequencer Handshake component: sequencer Master Task 1 Task 2

4. Four-phase handshake protocol • Circuit level implementation has separate wires for request and acknowledge • Four-phase handshake protocol implements return-to-zero of these wires Active Side Req := 1 ; Wait (Ack); Req := 0 ; Wait (-Ack); Passive Side Wait (Req); Ack := 1; Wait (-Req); Ack := 0; Req Ack

5. request ar active side passive side acknowledge ak request ar acknowledge ak time Handshake signaling event sequence: arakarak

6. a  b a b | c ; c b Some handshake components • Repeater : [a : [b ; b] ] • Mixer : [ [ a : c ; [a : c] [] b : c ; [b : c] ] ] • Sequencer : [[a : (b ; b ; c) ] ; [a: c]] a

7. Handshake circuit: duplicator • For each handshake on a0 the duplicator produces two handshakes on a1 • [[a0 : (a1 ; a1 ; a1) ] ; [a0: a1]] • cf. Handshake behavior sequencer.

8. Duplicator chains • Assume aM toggles at frequency f. • Hence a0 toggles at frequency f / 2M. • Let Edup be the duplication energy per cycle. • Power of duplicator chain equalsP = f Edup (1/2 + 1/4 + 1/8 + ...) < f Edup

9. Handshake components: realization From handshake notation to gate network in 8 steps: • Specify component in handshake notation. • Expand to individual boolean variables (wires). • Introduce auxiliary state variables (if required). • Derive a set of production rules that implements this refined specification. • Make production rules more symmetric (cheaper). • (Verify isochronic forks.) • Verify initialization constraints. • Analyze time, area, and energy.

10. For those who are interested in the details • Synthesis of Asynchronous VLSI Circuits • Alain J. Martin • Caltech CS-TR-93-28 • PostScript link via async.bib (html version) • Programming in VLSI: From communicating processes to delay-insensitive circuits • Pages 1–64 in C.A.R. Hoare, ed., • Developments in Concurrency and Communication

11. Handshake components realizations • Connector: trivial • Repeater: alternative ‘symmetrizations’ • Mixer: isochronic forks • Sequencer: introduction of auxiliary variable • Duplicator: up to you? • Selector: up to you!

12. a  b Repeater realization • Behavior: [a : [b ; b] ] • Expansion: [ [ar] ; [ br ; [bk] ; br ; [bk] ] ; ak ] • Production rules: false  ak ar bk br true  ak bk  br • However, not initializable!

13. Repeater realizations

14. a ; c b Sequencer realization Specification: [(a : (b ; b ; c) ) ; (a: c)] Expansion: [ [ar] ;br ; [bk] ; br ; [bk];cr ; [ck]; ak ; [ar] ; cr ; [ck] ; ak ]

15. ck ak ar br x cr bk Sequencer realization Sequencer: area, delay, energy • Area: 5 gate equivalents • Delay per cycle: 12 gate delays (8 with optimized C-element) • Energy per cycle: 12 transitions (10 with optimized C-element)

16. a || c b Parallel realization • [ a : ((b ; b)|| (c c)) ; a ] • Cf. Join component • Expansion: [ [ar] ;( (br ; [bk] ; br ; [bk])|| (cr ; [ck] ; cr ; [ck]) ) ; ak; [ar] ; ak]

17.  y   | x f  yw y y z f f   xw0 zw z z | x xr xw1 | x Tangram assignment x:= f(y,z) Handshake circuit

18. a  b c ar ak ck br cr bk cd bd Transferrer [ [ a : (b ; c)] ; [ a : (b ; cd:= bd ; c ; cd:= )] ]

19. b f a c Logic/arithmetic operator [ [ a : (b || c) ]; [ a : ((b || c) ; ad:= f(bd , cd ))]] Cheaper realization (delay sensitive): [ [ a : (b || c) ]; [ a : ((b || c) ; ad:= f(bd , cd ))]; “delay” ; ad:= ]

20. a b BUF1 A one-place fifo buffer byte = type [0..255] & BUF1 = main proc(a?chan byte & b!chan byte).beginx: var byte|forever do a?x ; b!x odend

21. ;  a x x  b   ;  ; a   x  b  A one-place fifo buffer byte = type [0..255] & BUF1 = main proc(a?chan byte & b!chan byte).begin x: var byte|forever do a?x ; b!x odend  a x x b

22. BUF1 b BUF1 a c 2-place buffer byte = type [0..255] &BUF1 = proc (a?chan byte & b!chan byte).begin x: var byte |forever do a?x ; b!x od end &BUF2: main proc (a?chan byte & c!chan byte).begin b: chan byte |BUF1(a,b) || BUF1(b,c)end

23. Two-place ripple buffer

24. Median a b Median filter median: main proc(a? chan W & b! chan W). begin x,y,z: var W & xy, yz, zw: var bool | forever do((z:=y; y:=x) || yz:=xy) ; a?x; (xy:= x<=y || zx:= z<=x); if zx=xy then b!xor xy=yz then b!yor yz=zx then b!zfiodend

25. GCD ab c Greatest Common Divisor gcd: main proc (ab?chan <<byte,byte>> & c!chan byte).begin x,y: var byte| forever doab?<<x,y>> ; do x<y then y:= y-xor x>y then x:= x-yod ; c!xodend

26. Tangram program T H C || Handshake circuit Handshake process E  · H · T = || · C ·T VLSI circuit Tangram Compilation

27. VLSI programming of asynchronous circuits behavior, area, time, energy, test coverage Tangram program feedback compiler simulator Handshake circuit expander Asynchronous circuit (netlist of gates)

28. Tangram tool box Let Rlin4.tg be a Tangram program: • htcomp -B Rlin4 • compiles Rlin4.tg into Rlin4.hcl, a handshake circuit • htmap Rlin4 • produces Rlin4*.v files, a CMOS standard-cell circuit • htsim Rlin4 a b • executes Rlin4.hcl with files a, b for input/output • htview Rlin4 • provides interactive viewing of simulation results

29. GCD ab c Greatest Common Divisor gcd: main proc (ab?chan <<byte,byte>> & c!chan byte).begin x,y: var byte| forever doab?<<x,y>> ; do x<y then y:= y-xorx>y then x:= x-yod ; c!xodend