Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)

1. Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: Motorola Preliminary Proposal to 802.15TG6 Date Submitted: 20 January, 2009 Source: Frederick Martin, Paul Gorday, Ed Callaway, Monique Brown, Motorola, Inc. Address: 8000 W. Sunrise Blvd., Plantation, FL, 33322, USA Voice: +1-954-723-6395, FAX: +1-954-723-3712, E-Mail: f.martin@motorola.com Re: TG6 Call For Proposals, IEEE P802.15-08-0829-01-0006, 3 December 2008. Abstract: Key requirements of the BAN standards effort, including power, cost and throughput scalability, can be addressed using a scalable direct sequence waveform. In addition, this approach facilitates novel ultra-low cost receiver implementations. Purpose: This document is intended as a preliminary proposal for addressing the requirements of the TG6 standard. Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Martin et al, Motorola

2. Presentation Summary Proposal outline only – details to be presented at future meetings Partial Proposal – PHY Only – compatible with many MAC proposals Focus – cost, power, form factor Martin et al, Motorola

3. The BAN Challenge: Scalability Standard must meet many applications with a single solution Must span 10 kbit/s to 10 Mbit/s Must scale power with throughput (Low bit rate solutions must be competitive with low throughput point solutions) Must be size and cost competitive with non-scalable solutions Must promote BAN size power and form factor constraints Martin et al, Motorola

4. Proposal direct sequence (chip) waveform -- similar in structure to 802.15.4 Moderate sequence length (length 16, 32, 64 ??) Ortogonal cyclical shift coding for increased throughput -- chip rate scaled with throughput Low chip rate, narrow transmission band for low throughput Higher chip rate, wider transmission bandwidth for higher throughput Martin et al, Motorola

5. Why DSSS? Simplicity: lends itself to low-power, low cost Scalability: Same structure can be used for low or high throughput Compatibility: Can be made compatible with existing 802.15.4 hardware Extendibility: Creates opportunities for ultra-low cost receiver implementations Martin et al, Motorola

6. PHY Scalability IEEE 802.15.4-2006 uses a fixed DSSS approach at 2.4 GHz … add scalability using chip rate and coding options: * Lower data rates are more optimally achieved with duty cycle. Martin et al, Motorola

7. Crystal-less Operation IEEE 802.15.4-2006 uses O-QPSK with half-sine pulse shape Similar to minimum shift keying (MSK) FM or differential phase detection methods can be used Tolerant of frequency offsets and phase noise Modest (~ 4 dB) penalty in Eb/No compared to matched filter detection Frequency stability requirements scale with chip rate Enables use of alternative (crystal-less) frequency references IEEE 802.15.4-2006 Martin et al, Motorola

8. Example: Differential Detection of 802.15.4 Simulation Results for 802.15.4 • Matched filter detection is • better when frequency • error is small. • Differential detection • significantly extends • frequency error tolerance. Differential Detection Matched Filter Detection Martin et al, Motorola

9. Sync Burst Protocol Sync#2 Sync#1 Sync#0 1920 ppm 1280 ppm 640 ppm Sync burst: Optional extended PHY preamble used to assist synchronization of crystal-less nodes Similar to the IEEE 802.22.1 WRAN beacon protocol Comprised of Sync Header, PHY Header, small data field Just enough data (~ 2 bytes) to indicate time/frequency relative to sender fc PSDU -640 ppm -1280 ppm -1920 ppm • For a 16 Mchip/s device • Demodulator tolerates • 640 ppm frequency error. • Three sync bursts extend • error tolerance to 1920 ppm. Sync Burst Time/ Frequency Data Start-of-Frame Delimiter Symbol Sync PHY Header Martin et al, Motorola

10. Crystal-less operation -- advantages -- Cost: Crystal cost is on order of 25% of total cost of single chip 15.4 node. -- Form Factor: The crystal is tallest component in the short range transceiver BOM. Reducing the height of a crystal costs $$$. -- Reliability: The crystal is the most fragile element in the short range transceiver BOM. -- Integration: Fewer parts = simpler manufacturing = lower cost Martin et al, Motorola

11. Summary Scalable direct sequence waveform Simple, Low cost, scalable, Meets requirements of BAN Opportunity for crystal-less operation Further frequency error tolerance possible with sync burst protocol This is a PHY-layer partial proposal. We welcome collaboration with other proposers. Martin et al, Motorola