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Korea Test Conference Jin-Soo Ko (jin-soo.ko@teradyne) June 25, 2014

ATE Debugging tool. 효율적 테스트 / 디버그를 위한 디자인과 테스트 업체의 연구 방안. Korea Test Conference Jin-Soo Ko (jin-soo.ko@teradyne.com) June 25, 2014. SW and debug tools magnify needle !. Market trends driving ATE SW tOOL roadmap. IG-XL : #1 in ATE Software - Why need Good SW-debug tool?.

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Korea Test Conference Jin-Soo Ko (jin-soo.ko@teradyne) June 25, 2014

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  1. ATE Debugging tool 효율적 테스트/디버그를 위한 디자인과 테스트 업체의 연구 방안 Korea Test Conference Jin-Soo Ko (jin-soo.ko@teradyne.com) June 25, 2014

  2. SW and debug tools magnify needle!

  3. Market trends driving ATE SW tOOL roadmap

  4. IG-XL: #1 in ATE Software - Whyneed Good SW-debug tool? IG-XL has been ranked #1 in ATE Software for the last four years by VLSI Customer Satisfaction Research Survey 30% faster test program development time Native MultiSite, Program Modularity, Templates, “Debug in the Zone”, Complete tool set, ESA Optimal throughput early in the product ramp resulting in faster time to profits. IG-XL’s Pure Parallel, Native MultiSite, Background DSP, TrueCT, Timelines Faster time to entitled yield Scan fail capture throughput, APIs to design environments, Protocol Aware Better quality programs that result in fewer RMAs and defect escapes VBT, Spike-Check tool, Simulation Tools, IG-Review, IG-Diff New users become self sufficient faster Easy to learn programming language, DUT Centric use model, Template programming

  5. Design  Test  Design Loop Failure Analysis / Yield Enhancement “on tester” tools “off tester” tools On-Tester Debug/ Characterization (hours/minutes) STDF Design Simulation events • Timing/Levels • Mixed Signal • Repeatability • Correlation ATPG Pattern & Test program. Gen. transactions • EDA-based Pattern Viewer • Simultaneous display of EDA and tester information • Diagnose Physical Device Faults

  6. How are scan failures resolved now? • Tools are not integrated • Information is lost or delayed between Test / Design / FA • Investigations can take weeks to complete

  7. The tester is only part of a bigger process Advanced ATE SW tools for Time to Market Teradyne Confidential

  8. OpenEDA: Connecting ATE SW (IG-XL) to the entire design and test environment High Volume Manufacturing: Test Floor Management Factory Data Management Adaptive Test Part Average Testing Operator Interfaces Peripherals and Handlers Yield Monitoring OEE Design and Test Development: EDA Links Test Program Generation Feedback To Simulation Test-Design Integration Yield Learning Data Analysis

  9. -3dB …and so on… Since the Engineer can control all the events from one pattern, we have Pattern Oriented Programming (POP) What The Test Engineer Sees…. POP Program Instruments with Psets (All instruments in parallel) Select Source Signal Trigger measurements at precise times Automatic data move and processing Exact Timeline Reprogram Instruments with PSets Select different Source Signal Trigger measurements at precise times Automatic data move and processing

  10. Serial Test Flow Concurrent Test Flow Initial Tests Block A Initial Tests Block A Tests Block E Tests Block D Tests Block B Tests Block B Test Time Tests Block C Tests Block F Tests Block C Test Time Full Functional Test Tests Block D Tests Block E Tests Block F Full Functional Test Concurrent test tool Timeline viewer • Development Challenges • Common bus/pins • Shared test resources • Flow manipulation • Multi-site implementation • Adaptive test & Retest • Debug tools

  11. Multi-sheet use model • Separate test code & data for each sub program • Tied together at the Job List Sheet • IG-XL 8.10.11 completes the Multi-Sheet Model = no more manual merging of sub programs Sub-Program A • Enabler for independent development • Reduces time to integrate Sub-Program B

  12. RF tools- LTE-A TX signal debug tool and result • IG-XL 7.30 • ESA 2.0 • 3GPP LTE • TD-SCDMA • 802.11n 4x4 MIMO • VSA 10.01 • 1 port vector • Power de-embedding • Signal sheet support • Smith charting • IG-XL 8.20 • ESA 4.0 • LTE-A (100MHz) • 802.11ac (160MHz) • 802.11ac (80+80) • BT 4.0 (LE) • VSA 16 • 90% reduction in VSA instance creation times • IG-XL 7.40 • ESA 2.5 • 3GPP LTE Update • Bluetooth 3.0 • VSA 11 • IG-XL 8.00.01 • ESA 3.0 • LTE 8.9 • VSA12 • IG-XL 8.10 • ESA 3.5 • LTE-A (R10) • 802.11ac • VSA 14

  13. Protocol Aware “Stored Response” ATE Power Mgmt Functions Integrated Mobile Device Audio / BB Functions Complex Device Architecture USB I/F GPS Tries to Test DRAM I/F 3G RF BB Proc DSP CPU Flash I/F WiFi JTAG I/F FM/TV Write.jtag ( ADDR: 04h, DATA: 55h) Read.jtag (ADDR: 0Ah, DATA  read_var) • Protocol Studio • For online debug of protocol transactions • Transaction results • Debug displays • Data capture setups • Module management • Port Properties Protocol Definition Editor For defining and modifying protocols

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