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The Annealing Algorithm Revisited: A Channel Routing Approach

Explore the evolution of annealing algorithm for chip layout design, from constraints to solution space problems, with focus on the annealing schedule and state space. Discover the impact of compaction, sequence to routing, floor planning, and experiments with annealing. Dive into tuning control parameters and chain statistics for efficient performance. Delve into structure of the move set, state space plots, and the role of accessibility aggregate functions. Explore stop criterion and temperature control for optimal results.

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The Annealing Algorithm Revisited: A Channel Routing Approach

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  1. The Annealing AlgorithmRevisited L.P.P.P. van Ginneken DigiPen Institute of Technology

  2. Outline • Channel Routing • The Annealing Schedule • The Annealing Algorithm • The state space

  3. Beginnings • January 1982: Yoshimura & Kuh • Horizontal & Vertical Constraint Graphs • Node merging • May 1983: Kirkpatrick, Gelatt & Vecchi • Chip placement for TCM • Global routing • Traveling Salesman • Sept-Nov 1982: my 1st EDA program • Annealing based channel router

  4. b b c a c e d a e a d Horizontal Constraints • Wire segments are nodes • Edge if segments overlap b c a e d

  5. b b c a c e d a e a d Vertical Constraints • Directed graph • Based on columns • “Segment b must be above a” • Cycles b a d

  6. State Space • Assigning wire segments to tracks a b d c e

  7. State Space Problems • Lots of illegal states • Overlapping Segments • Lots of illegal moves • Moving from one legal state to another may require moving a lot of segments • Forbid illegal states? • and illegal moves • Penalize illegal states?

  8. Solution: • Solution space is order (sequence) of wire segments • Move: Swap two segments in sequence • Easy to get from legal state to legal state • Fewer illegal moves • Horizontal constraints can't cause illegal states • Vertical constraints can cause illegal moves

  9. “Compaction” • Compaction process to assign wire segments to tracks • Maintains sequence • Takes some run time • Needed to find number of tracks

  10. Sequence to routing • Compaction step

  11. Floor planning • Uses two modules sequences • Easy to swap modules • Estimates of wire length • Not terribly accurate • Convert to real floor plan by slicing • 1984. Floorplan design using simulated annealing. Proc. IEEE Int. Conf. Computer-Aided Design. (Santa Clara, Nov. 12-15, 1984) ICCAD '84. IEEE Computer Society, 96-98.

  12. Experiments with Annealing • Sample problem: Traveling Salesman

  13. Is Annealing Run Time Efficient?

  14. The Annealing Schedule Control parameter • Starting value • Stop Criterion • Step size • Number of iterations

  15. How slow is slow enough?

  16. Tuning the control parameter • Time consuming • Problem instance dependent • Not a “real algorithm” • Needs to be automated to become an “Annealing Algorithm”

  17. Chain Statistics • t = control parameter (temperature) • E = mean score • H = accessibility (entropy) • σ = standard deviation of score

  18. Mean Score

  19. Two regions • Weak control t>T • Score density behaves as normal distribution • Strong control t < T • Distribution limited by lower bound

  20. Score Densities

  21. Standard Deviation

  22. Accessibility

  23. Aggregate functions

  24. Stop Criterion

  25. Begin Temperature tb >> σ Starting Temperature Step size 2kσt

  26. Structure of the move set • Choice of state space and move set • Rough or smooth State space plots • Traveling salesman problem • Reverse vs swap

  27. Swaps

  28. Reversals

  29. Min # of iterations • Compare the “size” of the distribution (accessibility) with the rate of dispersion

  30. Min # of iterations

  31. Bibliography 1984. Floorplan design using simulated annealing. Proc. IEEE Int. Conf. Computer-Aided Design. (Santa Clara, Nov. 12-15, 1984) ICCAD '84. IEEE Computer Society, 96-98. 1984. Annealing: the Algorithm. Research Report RC 10861, IBM, Yorktown Heights, NY. 1988 Stop criteria in simulated annealing. Proc.IEEE Int. Conf. Computer Design. (Rye, Oct.2-6, 1988), ICCD '88. IEEE Computer Society, 549-552. 1989. The Annealing Algorithm. Kluwer Academic, Dordrecht. 1988. An inner loop criterion for simulated annealing. Physics Letters A. 130, 8–9 (July 1988), 429–435.

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