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10GEPON Burst Receiver Ad-hoc. Goals. The goals of this ad-hoc are to resolve the following issues: TIA Gain Is different gain for 1G and 10G required? 10GEPON Burst Receiver architecture AC Coupled? or DC Coupled? Guard Time
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Goals • The goals of this ad-hoc are to resolve the following issues: • TIA Gain • Is different gain for 1G and 10G required? • 10GEPON Burst Receiver architecture • AC Coupled? or DC Coupled? • Guard Time • Is different Guard Time between Bursts of different data rate required?
Outline • Optical Receiver – Basic • TIA Parameters • LIA - AC vs. DC Coupled • Preamble Length
Clock CDR LIA TIA Data Offset Compensation AGC V(t) t i(t) V(t) t t Optical Receiver Architecture
RFB -A Vout Iin CT TIA Parameters • The primary function of the TIA is to convert the small current, from the photodiode, into a voltage while adding as little noise as possible to the output signal APD TIA optimized for 10G Source 1: 1.25Gbps 8B10B Coding 1.25Gbps LIA Source 2: 10.3125Gbps 64B66B Coding 10.3125Gbps LIA ? • TIA is characterized by several parameters: • Transimpedance Gain • Input Referred Noise • Bandwidth • One of the main “problems” of the TIA is the trade-off between Gain, Noise and Bandwidth
TIA – Bandwidth, Gain, and Noise • All 3 parameters of the TIA are function of the RFB • Bandwidth: The Transimpedance gain is equal to the RFB, while the Bandwidth is determined by the RC time constant. • Gain: Transimpedance gain of the TIA is the ratio of the output voltage to the input current. • Noise: Noise contribution of the TIA is characterized by the input referred noise current • The input referred noise current is related to the output noise voltage by the following equation:
TIA Gain Burst Parameter - Different for 1G and 10G? • In order to optimize the performance of the TIA in both 1G and 10G we need to support Variable TIA Gain • Gain can be varied between 1G and 10G bursts by changing the feedback resistor • In order to analyze the impact on TIA performance in 1G, we need to calculate the SNR of the TIA
TIA – Input Referred Noise • The ultimate limitation on the Optical Receiver sensitivity is the Noise • The noise includes the Photodiode’s Shot Noise and the noise added by the TIA • The major noise sources are the Feedback Resistor and Voltage Amplifier di²Rf Rf Rout di²AMP di²eq,in gm Cout Cin CDiode
Preamble length – function of maximum CID (Consecutive Identical Digits) • The data signal has a sequence of consecutive high and low bits in the middle of the sequence • The DC level during the consecutive bits begins to droop • Long sequence of consecutive bits can significantly change the DC level of the data and the optimum threshold voltage • A poor low frequency cut-off vertically closes the eye diagram and can reduce the sensitivity of the system • In order to achieve a lower low frequency cut-off, we need to extend the number of preamble bits • For example, in GPON, the CID is 72 bits
TIA – AGC Loop Timing Peak Detector output Noise • TIA AGC initialization time parameter needs to be much longer than the CID bit time • During “0” CID, the AGC loop should remain constant and not “running” to infinite gain • In between Bursts, the AGC needs long preamble, greater than AGC_τto enable AGC to “learn” new peak value idiode TIA_Gain Amplified Noise TIA_Output
TIA – AGC Response Delay V 1.2 1.0 0.8 0.6 0.4 0.2 0 t -120 -80 -40 0 40 80 120 τagc • Practical AGC has delayed response to signal-level change
The Problem – AC or DC Coupled APD TIA optimized for 10G Source 1: 1.25Gbps 8B10B Coding 1.25Gbps LIA Source 2: 10.3125Gbps 64B66B Coding 10.3125Gbps LIA ? ?
10G LIA – AC Coupled • 10G LIA is simulated by the following Transfer Function • The lower cut-off pole (f1) determine the CID length, while the higher cut-off pole (f2) determine the Bandwidth • For the lower frequency, 3MHz was simulated • For the higher frequency, 7GHz was simulated • In order to maintains minimum DC droop from the baseline, we need at least factor 4 over the τ 3dB 3MHz 7GHz
10G LIA – DC Coupled • In DC-coupled the RC (τ) is determined by internal capacitors • One capacitor for “fast” acquisition during preamble - and the second for CID support • During reception of the preamble, the threshold acquisition done by the “high” frequency cut-off pole, then switching to the “low” frequency cut-off pole to support CID
Transfer Function 3dB A: forward gain. K: feedback gain. WL: lowpass pole frequency (in feedback loop). WH: highpass pole frequency (in forward path). f1 = 3MHz f2 = 80MHz • f1 and f2 determine how much DC droop we are allowed from the baseline • During preamble we use f1_high then after “short” time we switch to f1_low to support CID
An example: CID = 64 X = 0.1 (10%) N = -4 * 64 = 2430bits ln(1 - 0.1) Preamble Length - A Formula • Assuming that 4 time constants is needed Where: = Number of CID = Required Preamble length [bits] = Deviation of baseline permitted during CID Just to the LIA For 5% droop -4 * 64 N = = 5000bits ln(1 - 0.05)
Open Questions • AC or DC Coupled? • In AC Coupled • What should be the Maximum overhead? • In DC coupled • What should be the Minimum overhead? • Different Guard time between different Bursts?