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2009 PIDS Chapter Updates Logic Ring-oscillator delay added. Fan-out = 1 and 4. I sat of p -MOSFET added. Other parameters assumed symmetric. Subthreshold currents held constant independent of L gate /year. HP, LOP, LSTP = 100 nA / m m, 5 nA / m m, 50 pA / m m respectively.
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2009 PIDS Chapter Updates Logic • Ring-oscillator delay added. Fan-out = 1 and 4. • Isatof p-MOSFET added. Other parameters assumed symmetric. • Subthreshold currents held constant independent of Lgate/year.HP, LOP, LSTP = 100 nA/mm, 5 nA/mm, 50 pA/mm respectively. • Criterion for S/D parasitic resistance set for degradation of 33%. DRAM • Small cell factor–4F2 introduced in 2011. • DRAM product size 1 yr delay from ITRS 2007/2008 (4 Gb in 2011). NVM • Floating-gate to charge-trapping NAND flash transition in 2012, delay 2 yr. • 3 bit/cell – 4bit/cell transition delays 2 years, to 2012. • 3-D charge-trapping flash in 2014, delay 1 year. • STT (spin-torque-transfer) MRAM added. Reliability • Major revisions in the reliability requirement specifications.
2009 Update: Nonvolatile Memory • NAND flash: • Half-pitch pulled-in 1 year from 2007/2008 Editions.