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Trends in Simulation at Nano-scale

Trends in Simulation at Nano-scale. Industrial perspective for university research trends. Steven J. Hillenius Executive Vice President Semiconductor Research Corporation. Needs for semiconductor simulation . Managing complexity Creating multilevel design tools

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Trends in Simulation at Nano-scale

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  1. Trends in Simulation at Nano-scale Industrial perspective for university research trends Steven J. Hillenius Executive Vice President Semiconductor Research Corporation

  2. Needs for semiconductor simulation • Managing complexity • Creating multilevel design tools • Determining the technology limits

  3. Example: Electronic Cell ~10 mm Communication Energy S1 S2 Scaling Limits need to be Understood Control S3 S4 Extreme scaling needed Major functional blocks: Sensing Communication Control Energy Technology Convergence Constraints and Trade-offs: Very limited space needs to by divided between sensors power supply electronic components Layout: 3D microcircuits

  4. High Level needs for nano-scale devices Integrated multilevel perspective: • From molecule to mesoscale nanostructures to microscale thin films and components to circuit level simulations of integrated devices • From femto scale electronic transitions and nanoscale and microscale molecular dynamics through macroscopic properties and behavior. Complexity of materials modeling in nanotechnology is increasing, due to increasing complexity from a variety of factors, which include: • Combinatorial System: Number of materials has continued to increase with each technology. • Size: Most of the devices have dimensions close to material domain sizes (e.g. grain size, thin film thickness).  • Topography: Non-planar material structures modulate properties and behavior, due to different materials at multiple interfaces. • Topology of the nanostructures and molecules. 

  5. Nanoscale simulation topics of importance to the Semiconductor Industry Process-related: • Interface of high-K dielectric on difference channel materials (III-V, CNT, graphene, Ge… as function of surface orientation, termination…) • Ultra-rapid thermal annealing (activation and diffusion in micro-s time frame) • Contact morphology • Strain in 3-D nanostructures • Defect formation due to strain • Process variability (line-width roughness, doping fluctuation, thermal fluctuation…) • Self-assembly • Synthesis to structure & composition, especially for the interfaces and multi-interface material structures. • Probe interactions with samples to enhance quantification of structure, composition, and critical properties.

  6. Nanoscale simulation topics of importance to the Semiconductor Industry Device-related: • Band structures in various III-V compounds • Band structures in 3-D structures (FinFET, CNT, graphene nanoribbon…) • Ballistic transport • Dissipative quantum transport • Transport through contact • Strain-enhanced transport • Device output variability (due to process variability) • Reliability (High-K interface, hot-carrier, TDDB, NBTI, …) • Analog performance (1/f noise, RTN…) • Parasitics and cross-talk • Modeling of novel memories (MRAM, PCRAM, ferroelectric, nano-crystals…)

  7. Nanoscale simulation topics of importance to the Semiconductor Industry Circuit-related: • Compact modeling interface • Predictive modeling for design of complex SoCs on advanced processes. • Reliability simulation (NBTI, TDDB, HCI, RTN) that were not as evident in older processes.. • Higher frequency design (GHz to THz) • Robust design elements

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