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Timing Analysis of Embedded Software for Speculative Processors. Tulika Mitra Abhik Roychoudhury Xianfeng Li School of Computing National University of Singapore. Why Timing Analysis?. Timing guarantees for real time embedded sys
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Timing Analysis of Embedded Software for Speculative Processors Tulika Mitra Abhik Roychoudhury Xianfeng Li School of Computing National University of Singapore
Why Timing Analysis? • Timing guarantees for real time embedded sys • Real time scheduling: Worst case bound on execution time so that tasks are guaranteed to be schedulable irrespective of inputs • Tight bound to avoid idle processor cycles • Extremely important for safety critical systems ISSS'02
Worst Case Execution Time (WCET) • Given a program and a micro-architecture, estimate the maximum execution time of the program on the micro-architecture for all possible inputs • Program path analysis [Shaw’89, Healy’98,..] • All possible paths in control flow graph are not feasible • Micro-architectural modeling • Dynamically variable instruction execution time due to • Cache, Pipeline [Li’99, Theiling’00, Schneider’99,..] • Speculative execution (branch prediction) ISSS'02
Speculative Execution • No Speculative Execution • Misprediction • Correct prediction b N T S Misprediction penalty ISSS'02
Impact of Speculative Execution Example: Insertion sort of 100 elements Worst case path without speculation for input <100, 99, ..., 2, 1> Worst case path with speculation for input<99, 100, ..., 2, 1> Branch misprediction penalty can alter worst case execution path ISSS'02
Branch Prediction Schemes ISSS'02
Global Branch Prediction • outcome (B3) = 1 if outcome (B1 B2) = {01, 10, 11} • Stores the outcomes of last n branches in a shift register, called Branch History Register (BHR) • Index into the prediction table using BHR • Prediction table stores the last outcome corresponding to that history b = 0 B1: if (a == 1) b = 1; B2: if (a == 2) b = 1; B3: if (b == 1) 0 1 0 1 BHR 1 1 Prediction Table ISSS'02
Framework for Branch Prediction Prediction schemes differ in terms of the index into the prediction table ISSS'02
Modeling Difficulty • Dynamic mapping: A branch can map to different entries in the prediction table • Aliasing: Different branches mapping to the same prediction table entry • Constructive/destructive Conflict • Conflicting branches with same/different outcomes • A single branch with same/different outcomes ISSS'02
Our Technique: ILP Formulation • Obtain linear constraints on total misprediction count for all possible inputs • Input: Control Flow Graph of the program • Objective function: WCET = costB countB + penalty mispredictionB ISSS'02
Flow Constraints: Easy !! Inflow = Basic Block Execution Count = Outflow Bound on maximum loop iterations • cs = ce = 1 • es,1 = 1 • e2,e +e1,e = 1 • es,1 +e2,1 = e1,2 +e1,e = c1 • e1,2 = e2,e +e2,1= c2 • Loop bound: e2,1 <= 100 start U blk 1 1 0 blk 2 0 1 end ISSS'02
Modeling Difficulty 1: Dynamic Mapping • Identify possible patterns for each branch • Static analysis of CFG for all possible patterns in branch history register (BHR) at node i • ci, ei, j #exec. of node i, edge ei, j with BHR = • mi #mispred. of node i with BHR = m i = mi c i = ci ei,j = ei,j mi ci ISSS'02
Modeling Difficulty 1: Dynamic Mapping • Model flow of pattern among nodes and edges start • inflow: c101 = e2,100 + e2,110 • outflow: c101 = e1,201 + e1,e01 U blk 1 1 0 blk 2 0 1 end ISSS'02
Modeling Difficulty 2: Aliasing • Variable pij: Number of times • occurs at node i followed by another occurrence at j • does not appear in the intermediate nodes i i j j ISSS'02
Modeling Difficulty 2: Aliasing s ps 3 3 p3 6 p3 8 p8 3 6 8 p6 8 p6 e ∑jpji = ∑jpij = ci e ISSS'02
Modeling Difficulty 3: Conflict ∑jp,0ji • Case 1: Branch of block i with is taken • Misprediction less than its total outflow under history & outcome of branch i taken ∑jp,1ij • Misprediction less than its total inflow under history & last outcome non-taken ∑jp,0ji • Case 2: Branch of block i with is non-taken 1 0 i 0 1 • ∑jp,1ij ISSS'02
Benchmarks ISSS'02
Modeling Accuracy ISSS'02
Summary • Modeling dynamic control speculation for timing analysis of embedded code • Unified parameterized framework that can be instantiated for various prediction schemes • Tight execution time bound for benchmark programs under various prediction schemes and prediction table sizes ISSS'02