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Fractal Technologies

Fractal Technologies. 45nm example2 library Validation With Crossfire™. Formats checked. Formats of example2 library checked: Spice Lpe_worst spice Verilog 2 files, 10 flavors With/without pwr pins, TETRAMAX, NTC, RECREM VHDL: Component Entities Liberty NLDM : 19 full databases

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Fractal Technologies

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  1. Fractal Technologies 45nm example2 libraryValidation With Crossfire™ Fractal Technologies Confidential

  2. Formats checked • Formats of example2 library checked: • Spice • Lpe_worst • spice • Verilog • 2 files, 10 flavors • With/without pwr pins, TETRAMAX, NTC, RECREM • VHDL: • Component • Entities • Liberty • NLDM : 19 full databases • CCS : 14 full databases(ff, sf, fs, ss, and tt missing) • ECSM: 19 full databases • LEF: 9 technology variants • Every LEF has full technology • PLIB: 9 technology variants • GDSII • Cadence CDB: layout, schematic, symbol views • Milky Way • CEL+FRAM • FRAM-only(FRAM supplied twice) • Colors used in this report: • Black lines describe checks • Green refers to checks passed successfully • Red indicates checks that failed, potential library errors • Additional formats supported • Documentation (html or pdf) • OpenAccess • Other ASCII based formats • SLIB • FastScan, atpg • Logicvision Quality in Design Formats

  3. Cell-presence • Created cell lists used for presence checks: • Schematics: 812 cells (Cells with a function, incl. TAPCELL) • EXTRA: 15 cells (Functional cells, separately provided) • FILLS: 13 cells (Filler cells) • DCAPS: 20 cells (Decoupling cells) • ISO: 8 cells • LH Level Shifters: 8 cells • HL Level Shifters: 4 cells • Remarks: • Technology defined in both std and EXTRA LEF file • Milky Way FRAM views provided twice • CCS misses 5 characterization corners (ff, sf, tt, ss and fs) present in NLDM and ECSM • ECSM corners in different locations (timing_power_noise and signal_storm) Quality in Design Formats

  4. Cell Presence Layout Databases • CDB details, file transfer problem? • Dcap cells missing: CAP16B DCAP32B DCAP64B • Schematic: has only GFILL cells, no FILL* -> GFILL cells have no symbol! • All views: cells from AN2 to LNSN, all cells from LNSN to OR4 are missing • Layout: has LNSN cell but does not exist anywhere else Quality in Design Formats

  5. Cell Presence Netlist and Behavior • Details: • lpe-worst: file transfer problem? No .ends last subcircuit • spice: only GFILL cells, no FILL cells • Verilog, VHDL: no tapcell Quality in Design Formats

  6. Cell Presence NLDM Structure of NDLM characterization corners bc 1.21-0.99 bc 0.99 bc 0.99-0.99 bc-0.99 EXTRA bc bc 1.21-1.21 bc-EXTRA bc 0.99 -1.21 Quality in Design Formats

  7. Cell Presence CCS & ECSM • CCS corners identical to NLDM: • -lt*, -ml*, -tc*, -wc*, -wcl*, -wcz* • Missing CCS corners: • tt, sf, fs, ss, and ff • ECSM corners identical to NLDM: • -lt*, -ml*, -tc*, -wc*, -wcl*, -wcz*, -tt*, -sf*, -fs*, -ss*, -ff* • ECSM files are not in one place: • Tt, sf, ss, fs and ff corners inside timing_power_noise • All other ecsm files in signal_storm Quality in Design Formats

  8. Hierarchy consistency • All databases contain master cells for all instances: • Cadence CDB, Milky Way, gdsII, spice, verilog, VHDL • Exceptions: • CDB schematic: ipin, opin, iopin, nch, pch, ndio symbol views missing Quality in Design Formats

  9. Terminals & Pins (1) • Are the same pins defined in all formats? • Golden Reference used: verilog • Check passed all formats (except gdsII) • CDB layout view has BIDIRECTIONAL pins instead of input/output Example lib 2 Crossfire error visualization Quality in Design Formats

  10. Terminals & Pins (2) • Most pins are drawn in M1 • Applies to CDB, Milky Way, LEF, PLIB • Exceptions having pins in M2: NR2, DFCNQD1, AI21, D3D2, ND2D4,D2D3, D2D2, MUX2ND,MUX2ND, MUX2D1, DFQD1,DFCNQD • Extra VDDL pin for LH level shifters • No VDDH pin for HL level shifters? • Antenna symbol/schematic has no VDD pin • All other symbol views have additional VDD/VSS pins • Labels present in M1TXT or M2TXT • Applies to CDB, MilkyWay CEL, and gdsII Quality in Design Formats

  11. Layout vs. layout • Checks identity between polygons: layout-vs-layout or abstract-vs-layout • Performs Boolean mask XOR operations • Detailed check example: Abstract vs Layout • “11 0” in GDSII <= “M1” LEF • GDSII M1, M2, VIA equals • LEF • PLIB • MilkyWay cell-frame FRAM • MilkyWay frame-only FRAM • GDSII all layers equals: • CDB-layout • MilkyWay cell-frame CEL Interview showing PLIB, LEF, GDSII, CDB and MilkyWay Quality in Design Formats

  12. Abutment • All cells checked for self-symmetry and left/right abutment (alignment on cell-boundary) with reference cell (INVD): • Check passed GDSII, all layers • Example: Poly abutment error on multi-pitch level-shifter LH cells • Only, poly not e.g. nwell Quality in Design Formats

  13. Routability (1) • Checks if signal-pins can be routed to cell-boundary • Uses fast internal maze router • Users select layers (e.g. M1 only) or special rules (e.g. double-via’s on outputs of high-drive cells) • Technology settings (rules, vias, pitch) read from LEF technology • Results • All cells are compatible for height and pitch • Total checked 3951 pins, 880 cells • 2666 routable in M1, 67% above average (55%) Quality in Design Formats

  14. Routability (2) • Only 1 pin is only routable only in M3: • Cell DFCNQD1, pin D Quality in Design Formats

  15. Functional Equivalence • Verified functional equivalence between Verilog, SPICE, VHDL and Liberty • Checks equivalence of Boolean expressions from different databases • For (schematics) & SPICE, expressions are automatically extracted. • Spice vs nldm: ok • Verilog vs nldm: ok • Tetramax vs Verilog: ok Crossfire feedback showing equations extracted from SPICE Quality in Design Formats

  16. Characterization • Cross-checks arc-presence between Liberty, VHDL and Verilog • Sanity checks on characterized delay and power numbers • All NLDM delays increase with increasing output capacitance • SDF expressions equal Liberty when expressions • Arc conditions are consistent (no redundant or conflicting conditions) Quality in Design Formats

  17. CCS Characterization (1) • Many cells do not have a single peak current (tc corner) • Current curves generally have a “correction current” at the tail (tc corner) Cell AN2, output_current_fall A2->Z Cell DFCND, output_current_rise CP->Q Quality in Design Formats

  18. CCS Characterization (2) • 86 Cells exhibit peak-current anomalies (tc corner) • E.g. Cell AN3, rise current A3Z • Curve for slew 0.02, cap=0.1739 has 50 samples instead of 10 Cell AN2, CCS peak currents Cell AN2, CCS current curve Quality in Design Formats

  19. CCS Characterization (3) • More examples of CCS peak current anomalies (tc corner) Cell MUX2, CCS output_current_rise S -> ZN Cell NR4, CCS output_current_rise A4 -> ZN Quality in Design Formats

  20. CCS Characterization (4) • Tristate buffer cells use different capacitance values for CCS and NLDM, e.g. : • tc corner, cell BUFTD, cell_rise: I  Z • CCS indices: [0.00164, 0.008240, 0.021430, 0.047820, 0.10060, 0.20610, 0.41720] • NLDM indices: [0.0065720, 0.013170, 0.026360, 0.052750, 0.1055, 0.21110, 0.42220] • CCS delays for tc corner are identical to NLDM delays • 2%/0.01 tolerance values Quality in Design Formats

  21. ECSM Characterization • Many ECSM-curves have large deviations (20-300%) between ECSM and NLDM delay values, e.g.: • TC corner, cell AOI22D1, cell_fall: A1  ZN, index (1,1) (cap=0.00045pf, slew=0.004) • 33% deviation of delay value (0.01285 vs 0.0169) Cell AOI22, CCS-NLDM deviation Cell AOI22, clip from ECSM tc corner Cell AN2, no CCS-NLDM deviation, typical Quality in Design Formats

  22. Characterization Comparison • Histogram plot of cell-rise delays • bc, tc and wc corners • Delay cells excluded Quality in Design Formats

  23. Conclusions • Summary of inconsistencies detected: • Structure Technology defined in both std and EXTRA LEF file Milky Way FRAM views provided twice CCS misses 5 characterization corners (ff, sf, tt, ss and fs) ECSM corners in different locations • Presence Missing EXTRA cells in MilkyWay, PLIB, spice Level shifters missing from tt, sf, fs, ss, and ff Incomplete CDB and lpe databases • Characterization CCS peak current anomalies in 86 cells CCS capacitance values different for BUFT cells ECSM vs NLDM mismatches Quality in Design Formats

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