CFTP ( Configurable Fault Tolerant Processor )

1. CFTP( Configurable Fault Tolerant Processor ) Vijai Raghunathan EE585 Instructor: Dr.Lumpp University of Kentucky

2. Introduction • Objective of this paper – To design a system for the harsh environment present in space. • Lot of obstacles in space. • Communication to system not possible always. • So need a good fault tolerant system (FTS). • Paper discusses a processor system involving some current trends in FTS. University of Kentucky

3. Why Fault Tolerance in Space ? • Space – Harsh Environment • Si – easily perturbed • High Cost • High Testing Time University of Kentucky

4. Causes for Faults in Space • Radiation (within the atmosphere) • High Energy ions (in space) • Ions introduce error in logic circuits. • CMOS devices – susceptible to ionized particles. University of Kentucky

5. Effects of Radiation • Single event effects (SEEs) - occur unpredictably • Total Dose Effects - Deterioration of device over time • TMR – reduces SEE • Commercial off the shelf devices are not advisable. University of Kentucky

6. Hence the following Requirements • Flexibility • Reliability • Low Cost • Rapidly Developed System University of Kentucky

7. Proposed Solution • CFTP – Configurable Fault Tolerant Processor. • TMR – Triple Modular Redundancy • SOC – System On a Chip • FPGA – Field Programmable Gate Array (supports reconfiguration) • Includes EDAC – Error Detection and Correction. University of Kentucky

8. Two Fold objectives of CFTP • Evaluation of a TMR, reconfigurable SOC capable of mitigating bit errors using voting logic. • Demonstrate the use of reconfigurable FPGA technology in spacecraft architecture thereby decreasing development time, cost and increase reliability. University of Kentucky

9. Example of SOC • Integrating all components into a single chip • Processor Core • RAM, ROM, Flash • CAN interface • ADC/DAC • Oscillators/Clocks University of Kentucky

10. Advantages of FPGAs • Follows Moore’s Law. • Decent clock speeds (MHz) • Radiation Hardened (RADHARD) FPGA available. (eliminates TDE+SEE) University of Kentucky

11. Estimated Payload (on-orbit) • PCB – Printed Circuit Board 5.3x7.3 inches • FPGA – initially configured as TMR processor. • SDRAM, Flash to include variety of configurations. University of Kentucky

12. CFTP Architecture • Though not fully SOC, somewhat close. • 13 devices - 2 FPGAs - 8 memory chips - 2 power converters - 1 oscillator University of Kentucky

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15. CFTP Architecture (Continued) • Two main Components (FPGAs). • Configurable Processor (CP) FPGA • Main processor that does all the necessary computations. • Configuration Control (CC) FPGA • This FPGA is responsible for reconfiguring the other FPGA with reconfigurable soft cores. University of Kentucky

16. CFTP Architecture (Continued) • CP • 16-bit TMR processor • SDRAM controller • EDAC • CC • Configuration Controller. • PC/104 bus interfaces. • Command & Status Register. University of Kentucky

17. CC-CP Interface/Connection University of Kentucky

18. Triple Modular Redundancy • 3 microprocessors. • Their outputs are given to a voter. • Single processor errors can be detected. • Presence of EDAC. University of Kentucky

19. Applications • Currently only as STP • STP – Space Test Program • Naval Postgraduate School’s NPSAT1 satellite. • US Naval Academy MidSTAR-1 satellite. University of Kentucky

20. Testing • Development Testing • Confirm all the memory models (ROM,RAM,EPROM) store and pass configurations. • Confirm the bus passes data properly. • Checking all data paths is very tough owing to the flexibility of the design. • At the minimum connections between components must be correct. University of Kentucky

21. Testing (Continued) • Operational Testing • Mimic specific operations/missions that the system has to perform and see if it works! • Environmental Testing • Simulate conditions like vacuum, high electromagnetic interference etc. University of Kentucky

22. Conclusion • Challenge – Designing a system to incorporate different designs without knowing what the designs are. • The CFTP demonstrates the necessary flexibility and re-configurability for space environment. • Continued research in this area would help future space technology. University of Kentucky

23. References • http://www.sp.nps.navy.mil/npsat1/technical/SSC03-XI-5.pdf (Main paper) • http://www.wallpaper.net.au/wallpaper/space/Space%20Fiction%20System%20Rail%20-%201024x768.jpg • http://en.wikipedia.org/wiki/System-on-a-chip • http://en.wikipedia.org/wiki/FPGA University of Kentucky