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The Synthesis of Stochastic Logic for Nanoscale Computation

The Synthesis of Stochastic Logic for Nanoscale Computation. Marc Riedel. joint work with. Weikang Qian and John Backes. Circuits & Biology Lab , University of Minnesota. IWLS 2007 , San Diego May 31, 2007. Computing Beyond CMOS. Intense research into novel materials and devices:.

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The Synthesis of Stochastic Logic for Nanoscale Computation

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  1. The Synthesis of Stochastic Logic for Nanoscale Computation Marc Riedel joint work with Weikang Qian and John Backes Circuits & Biology Lab, University of Minnesota IWLS 2007, San Diego May 31, 2007

  2. Computing Beyond CMOS Intense research into novel materials and devices: Carbon Nanotubes… Biological Processes… Molecular Switches… IWLS 2007

  3. c Computing Beyond CMOS Many technologies still in exploratory phase: ! IWLS 2007

  4. Nanoscale Circuits Identify general traits that impinge upon logic synthesis: • Topological constraints. • Inherent randomness. • High defect rates. Features: • High density of bits. Challenges: carbon nanowire crossbar IWLS 2007

  5. inputs outputs logic Circuit Modeling Model defects, variations, uncertainty, etc.: 0 0 1 1 0 Characterize probability of outcomes.

  6. inputs outputs logic Circuit Modeling Functional description is Boolean:

  7. inputs outputs Circuit Modeling Consider a probabilistic interpretation: logic stochasticlogic

  8. inputs outputs Stochastic Logic Consider a probabilistic interpretation: p1 = Prob(one) 0 stochasticlogic 0,1,1,0,1,0,1,1,0,1,… 1 1,0,0,0,1,0,0,0,0,0,… 0 p2 = Prob(one) serial bit streams

  9. inputs outputs Stochastic Logic Consider a probabilistic interpretation: 0 stochasticlogic 1 0

  10. Stochastic Logic Consider a probabilistic interpretation: 0 1 p1 = Prob(one) 0 0 0 stochasticlogic 1 1 0 1 0 p2 = Prob(one) 0 0 0 parallel bit streams

  11. Stochastic Logic Consider a probabilistic interpretation: 0 stochasticlogic 1 0 parallel bit streams

  12. Stochastic Logic Interpret outputs according to fractional weighting: 0 stochasticlogic 1 0

  13. Synthesis of Stochastic Logic Given a technology characterized by: • Circuit that computes a probability distribution corresponding to a logical specification. • High degree of structural parallelism. • Inherent randomness in logic/interconnects. Synthesize: Strategy: • Cast problem in terms of arithmetic operations. • Perform synthesis with binary moment diagrams. IWLS 2007

  14. Probabilistic Bundles 0 1 x 0 X 0 1 A real value x in [0, 1] is encoded as a stream of bits X.For each bit, the probability that it is one is: P(X=1) = x. IWLS 2007

  15. = c P ( C ) = c P ( C ) = P ( A ) P ( B ) = + - P ( S ) P ( A ) [ 1 P ( S )] P ( B ) = a b = + - s a ( 1 s ) b Arithmetic Operations Multiplication (Scaled) Addition IWLS 2007

  16. Nanowire Crossbar (idealized) IWLS 2007

  17. Nanowire Crossbar (idealized) Randomized connections, yet nearly one-to-one. IWLS 2007

  18. Shuffled AND

  19. Multiplication Shuffled AND Takes the AND of randomly chosen pairs. IWLS 2007

  20. Bundleplexing

  21. Scaled Addition ¾ Bundleplexer Randomly selection of wires from different bundles, according to a fixed ratio.

  22. Stochastic Logic { Shuffled ANDs,Bundleplexers A 0 { } A 1 B . . { . A n IWLS 2007

  23. Stochastic Logic { Shuffled ANDs,Bundleplexers 1 { } 0 . . { . 1 IWLS 2007

  24. Synthesis Strategy • From circuit, construct a data structure called a multiplicative binary moment diagram (*BMD). • Manipulate the *BMD into the right form. • Implement a stochastic circuit with Shuffled AND gates and Bundleplexors. IWLS 2007

  25. f x x x x x x x x 2 x x x x = + + - 1 2 3 1 2 4 3 4 1 2 3 4 Arithmetic Functions IWLS 2007

  26. f w f w f x = + L L R R f x x x x x x x x 2 x x x x = + + - 1 2 3 1 2 4 3 4 1 2 3 4 f f L R Construct *BMD See R. Bryant, “Verification of Arithmetic Circuits with BMDs,” 1995. IWLS 2007

  27. f x x x x x x x x 2 x x x x = + + - 1 2 3 1 2 4 3 4 1 2 3 4 Split *BMD positive negative

  28. X f x x x x x x x x = + + 1 2 3 1 2 4 3 4 P f x x x x x x x x 2 x x x x = + + - 1 2 3 1 2 4 3 4 1 2 3 4 Normalize positive

  29. w w x x X BUX SAND X f f f f L L R R Implement Stochastic Logic IWLS 2007

  30. Implement Stochastic Logic IWLS 2007

  31. Size of Stochastic Circuits

  32. Error Percentages

  33. Discussion • Exploits both parallelism and randomness. • Obviates the need for post-fabrication configuration. • Measured tradeoff between degree of redundancyand accuracy of the computation. IWLS 2007

  34. Research Theme: Probabilistic Computing Bacteria are genetically engineered to produce a drug that fights cancer. compound drug E. Coli (fixed quantity) IWLS 2007

  35. Research Theme: Probabilistic Computing Bacteria invade cancerous tissue: cancerous tissue IWLS 2007

  36. Research Theme: Probabilistic Computing Compound is injected. Bacteria produce the drug: cancerous tissue IWLS 2007

  37. E. Coli Research Theme: Probabilistic Computing Needed: synthesis of probabilistic response in each bacterium. produce drug with Prob. 0.3 compound don’t produce drug with Prob. 0.7 See B. Fett, J. Bruck and M. Riedel, “Synthesizing Stochasticity in Biochemical Systems”, DAC 2007. IWLS 2007

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