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Chapter 2: Data Manipulation

Chapter 2: Data Manipulation. Chapter 2: Data Manipulation. 2.1 Computer Architecture 2.2 Machine Language 2.3 Program Execution. Computer Architecture. Central Processing Unit (CPU) or processor Arithmetic/Logic unit versus Control unit

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Chapter 2: Data Manipulation

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  1. Chapter 2:Data Manipulation

  2. Chapter 2: Data Manipulation • 2.1 Computer Architecture • 2.2 Machine Language • 2.3 Program Execution

  3. Computer Architecture • Central Processing Unit (CPU) or processor • Arithmetic/Logic unit versus Control unit • Registers : temporary storage units within the CPU that hold data being processed and are very easily accessible by CPU. Two types of Registers • General purpose : Can be used for any task • Special purpose : Used for special task e.g Program Counter ( PC) and Instruction Register (IR) • Bus • Motherboard

  4. Inside the System Unit

  5. Figure 2.1 CPU and main memory connected via a bus

  6. Bus and its types A bus connects parts of the CPU to one another. It also links the CPU to the various components of the system board. There are three types of buses: Data Bus Address Bus Control Bus

  7. Von Neumann Stored Program Concept A program can be encoded as bit patterns and stored in main memory. From there, the CPU can then extract the instructions and execute them. In turn, the program to be executed can be altered easily.

  8. Terminology • Machine instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU • Machine language: The set of all instructions recognized by a machine

  9. Machine Instruction Types • Data Transfer: copy data from one location to another • Arithmetic/Logic: use existing bit patterns to compute a new bit patterns • Control: direct the execution of the program

  10. Data Transfer Instructions Load : To fetch data from Main Memory Store : To save data into Main Memory Move: To transfer data from register to register

  11. Arithmetic / Logical Instructions Add / Sub / Mult / Div / Mod And / OR / XOR / NOT /SHIFT /ROTATE

  12. Arithmetic/Logic Operations • Logic: AND, OR, XOR • Masking • Rotate and Shift: circular shift, logical shift, arithmetic shift • Arithmetic: add, subtract, multiply, divide • Precise action depends on how the values are encoded (two’s complement versus floating-point).

  13. Control Instructions Jump Halt

  14. What is a High Level Language and Machine Language • A High Level Language is easily understood by human beings • A Machine Language Instruction is in Binary format easily understood by the Machine / Computer • Difference ?? • One High Level Language Instruction gets translated into Many Machine Level Instructions thus taking more time to execute

  15. Example • If I write in High Level Language • a:= b+c • It gets translated into 4 machine level instructions: • Fetch b • Fetch c • Add b and c • Store their result in a

  16. Figure 2.2 Adding values stored in memory

  17. Figure 2.4 The architecture of the machine described in Appendix C

  18. Difference Between PC and IR • Program counter (PC) : • It contains the address of the next instruction to be executed • Instruction Register: • It contains the Instruction that is currently being executed by the CPU

  19. Parts of a Machine Instruction • Op-code: Specifies which operation to execute • Operand: Gives more detailed information about the operation • Interpretation of operand varies depending on op-code

  20. Figure 2.5 The composition of an instruction for the machine in Appendix C

  21. Figure 2.6 Decoding the instruction 35A7

  22. Figure 2.7 An encoded version of the instructions in Figure 2.2

  23. Program Execution • Controlled by two special-purpose registers • Program counter: address of next instruction • Instruction register: current instruction • Machine Cycle • Fetch • Decode • Execute

  24. Figure 2.8 The machine cycle

  25. Figure 2.9 Decoding the instruction B258

  26. Figure 2.10 The program from Figure 2.7 stored in main memory ready for execution

  27. Figure 2.11 Performing the fetch step of the machine cycle

  28. Figure 2.11 Performing the fetch step of the machine cycle (cont’d)

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