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Systems Programming

Systems Programming. Chapter 1 Background III. 1.3.3 SIC Programming Examples. In Figure 1.2(a), 3-byte word is moved by loading it into register A and then storing the register at the desired destination. RESW reserves one or more words of storage

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Systems Programming

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  1. Systems Programming Chapter 1 Background III CPS4200 System Programming- 2007 Spring

  2. 1.3.3 SIC Programming Examples • In Figure 1.2(a), • 3-byte word is moved by loading it into register A and then storing the register at the desired destination. • RESW reserves one or more words of storage • WORD reserves one word of storage, which initialized to a value defined in operand field of the statement. • The statement BYTE and RESB performs similar storage-definition CPS4200 System Programming- 2007 Spring

  3. 1.3.3 SIC Programming Examples LDA FIVE STA ALPHA LDCH CHARZ STCH C1 … … ALPHA RESW 1 FIVE WORD 5 CHARZ BYTE C’Z’ C1 RESB 1 Figure 1.2 (a) SIC CPS4200 System Programming- 2007 Spring

  4. 1.3.3 SIC Programming Examples • In Figure 1.2(b), • shows same two data-movement operations in SIC/XE. • Immediate addressing: #5 • Decimal value of ASCII code for ‘Z’ is 90. CPS4200 System Programming- 2007 Spring

  5. 1.3.3 SIC Programming Examples LDA #5 STA ALPHA LDA #90 STCH C1 … … ALPHA RESW 1 C1 RESB 1 Figure 1.2(b) SIC/XE 12 CPS4200 System Programming- 2007 Spring

  6. 1.3.3 SIC Programming Examples • In Figure 1-3 (a) • Use register A • ALPHA + INCR – 1 then store it in BETA • GAMMA + INCR – 1 then store it in DELTA CPS4200 System Programming- 2007 Spring

  7. 1.3.3 SIC Programming Examples LDA ALPHA ADD INCR SUB ONE STA BETA LDA GAMMA ADD INCR SUB ONE STA DELTA … … ONE WORD 1 . ALPHA RESW 1 BETA RESW 1 GAMMA RESW 1 DELTA RESW 1 INCR RESW 1 Figure 1-3 (a) SIC CPS4200 System Programming- 2007 Spring

  8. 1.3.3 SIC Programming Examples • In Figure 1-3(b) • The value INCR is loaded onto register A • Using ADDR to add this value to register A • Using immediate addressing • The program is more efficient CPS4200 System Programming- 2007 Spring

  9. 1.3.3 SIC Programming Examples LDS INCR LDA ALPHA ADDR S, A SUB #1 STA BETA LDA GAMMA ADDR S, A SUB #1 STA DELTA … …. ALPHA RESW 1 BETA RESW 1 GAMMA RESW 1 DELTA RESW 1 INCR RESW 1 CPS4200 System Programming- 2007 Spring

  10. 1.3.3 SIC Programming Examples • Looping and Indexing operation: • In Figure 1-4 (a), it shows a loop that copies one 11-byte character string to another. CPS4200 System Programming- 2007 Spring

  11. 1.3.3 SIC Programming Examples LDX ZERO MOVECH LDCH STR1, X STCH STR2, X TIX ELEVEN JLT MOVECH … … STR1 BYTE C’TEST STRING’ STR2 RESB 11 . ZERO WORD 0 ELEVEN WORD 11 Figure 1-4(a) SIC CPS4200 System Programming- 2007 Spring

  12. 1.3.3 SIC Programming Examples LDT #11 LDX #0 MOVECH LDCH STR1, X STCH STR2, X TIXR T JLT MOVECH … … STR1 BYTE C’TEST STRING’ STR2 RESB 11 . ZERO WORD 0 ELEVEN WORD 11 Figure 1-4(b) SIC/XE CPS4200 System Programming- 2007 Spring

  13. 1.3.3 SIC Programming Examples LDA ZERO STA INDEX ADDLP LDX INDEX LDA ALPHA, X ADD BETA, X STA GAMMA, X LDA INDEX ADD THREE STA INDEX COMP K300 JLT ADDLP … INDEX RESW 1 … ALPHA RESW 100 BETA RESW 100 GAMMA RESW 100 . ZERO WORD 0 K300 WORD 300 Figure 1-5(a) SIC CPS4200 System Programming- 2007 Spring

  14. 1.3.3 SIC Programming Examples LDS #3 LDT #300 LDX #0 ADDLP LDA ALPHA, X ADD BETA, X STA GAMMA, X ADDR S, X COMPR X, T JLT ADDLP … ALPHA RESW 100 BETA RESW 100 GAMMA RESW 100 . Figure 1-5(b) SIC/XE CPS4200 System Programming- 2007 Spring

  15. 1.3.3 SIC Programming Examples • I/O • Read 1 byte of data from device F1 and copy it to device 05. • RD (Read data) transfers 1 byte of data from this device into the rightmost byte of register A. • TD (Test Device) test the addressed device and the condition code (CC) is set to indicate the result of this test. • CC  “less than” if the device is ready • CC “equal” if the device is not ready CPS4200 System Programming- 2007 Spring

  16. 1.3.3 SIC Programming Examples INLOOP TD INDEV JEQ INLOOP RD INDEV STCH DATA . . OUTLP TD OUTDEV JEQ OUTLP LDCH DATA WD OUTDEV . . INDEV BYTE X’F1’ OUTDEV BYTE X’05’ DATA RESB 1 Figure 1.6 I/O CPS4200 System Programming- 2007 Spring

  17. 1.3.3 SIC Programming Examples JSUB READ … READ LDX ZERO RLOOP TD INDEV JEQ RLOOP RD INDEV STCH RECORD,X TIX K100 //Add 1 to index and compare to 100 JTL RLOOP RSUB . . INDEV BYTE X’F1’ RECORD RESB 100 ZERO WORD 0 K100 WORD 100 Figure 1.7 (a) SIC Subroutine CPS4200 System Programming- 2007 Spring

  18. 1.3.3 SIC Programming Examples JSUB READ … READ LDX #0 RLOOP TDT #100 JEQ RLOOP RD INDEV STCH RECORD,X TIXR T JTL K100 RSUB . . INDEV BYTE X’F1’ RECORD RESB 100 Figure 1.7 (b) SIC/XE Subroutine CPS4200 System Programming- 2007 Spring

  19. 1.4 (CISC) Machine-Self Reading • Complex Instruction Set Computer (CISC) • Relatively large and complicated instruction set • Several different instruction format and length • Many different addressing modes • VAX family and Intel x86 family CPS4200 System Programming- 2007 Spring

  20. 1.4 (CISC) Machine • VAX family • Memory • Byte addressing • Two consecutive bytes  word, four bytes longword, eight byte quadword, sixteen bytesoctaword. • Virtual address space 232 bytes. • One half of the virtual space is for operating system  system space • Another half of the virtual space is called process space • Register • 16 general-purpose registers, R0-R15, 32 bits • R15 is the program counter, points to the next instruction byte to be fetched CPS4200 System Programming- 2007 Spring

  21. 1.4 (CISC) Machine • Register • R14 is stack pointer SP, which points to the current top of the stack • R13 is the frame pointer FP, VAX procedure call build a data structure called a stack frame, and place its address in FP. • Processor status longword (PSL) contains state variable and flags associated with a process. • Data Formats • Integer: byte, word, longword, quadword, or octaword,2’s complement representation for negative • Four different floating-point data format from 4 to 16 bytes. CPS4200 System Programming- 2007 Spring

  22. 1.4 (CISC) Machine • Instruction Formats • Variable length instruction format. • Instruction consists of an operation code (1 or 2 bytes) followed by up to six operand specifiers. • Addressing Modes • Large number of addressing modes. • With only few exceptions, any of these addressing modes may be used with any instruction. • The operand itself may be in a register, or its address may be specified by a register. CPS4200 System Programming- 2007 Spring

  23. 1.4 (CISC) Machine • There are several base relative addressing modes, with displacement fields of different lengths; when used with register PC, there become program-counter relative modes. • Instruction Set • Instruction mnemonics are formed by combining: • A prefix that specifies the type of operation, • A suffix that specifies the data type of the operands, • A modifier that gives the number of operands involved. • Example: ADDW2, add operation with two operands, each a word in length. CPS4200 System Programming- 2007 Spring

  24. 1.4 (CISC) Machine • Input/Output • I/O device controller • each controller has a set of control/status and data registers, which are assigned locations in the physical address space. • The portion of the address space into which the device controller registers are mapped is called I/O space. The memory management routines will handle the association of an address in I/O space with a physical register in a device controller. CPS4200 System Programming- 2007 Spring

  25. 1.5 (RISC) Machine • RISC (Reduced Instruction Set Computer) • A RISC machine is characterized by a standard, fixed instruction length (usually equal to one machine word), and single-cycle execution of most instructions. • The number of machine instructions, instruction formats, and addressing modes is relatively small. • UltraSPARC, PowerPC, and Cray T3E supercomputing system CPS4200 System Programming- 2007 Spring

  26. 1.5 (RISC) Machine • UltraSPARC Architecture • Memory • Byte address • Two consecutive bytes halfword, • Four bytes  word, • Eight bytes  doubleword. • Virtual address space of 264bytes. • Each segment is 256 megabytes. Each segment is divided into pages, which are 4096 bytes. CPS4200 System Programming- 2007 Spring

  27. 1.5 (RISC) Machine • UltraSPARC Architecture • Register • Includes a large register file that usually contains more than 100 general-purpose registers. • Any procedure can only access 32 registers, r0 to r31. • The first eight registers are global. • The other 24 registers available to a procedure can be visualized as a window. These windows overlap, so some registers in the register file are shared between procedures. CPS4200 System Programming- 2007 Spring

  28. 1.5 (RISC) Machine • Floating-point computations are performed using a special floating-point unit. This unit contains a file of 64 double-precision floating-point registers. • Data Formats • Integers, floating-point values and characters. • Integers are stored as 8-, 16-, or 64-bit binary numbers. • Singed and unsigned are supported. • Three different floating-point data format. CPS4200 System Programming- 2007 Spring

  29. 1.5 (RISC) Machine • Instruction format • Three basic instruction formats an all are 32 bits long. • Format 1 is for call instruction. • Format 2 is for branch instruction. • Format 3 is for register loads and stores, and three-operand arithmetic operations. • Addressing modes • Immediate mode and register direct mode. CPS4200 System Programming- 2007 Spring

  30. 1.5 (RISC) Machine • PC-relative • Register indirect with displacement • Register indirect indexed • Instruction Set • Less than 100 instruction set. • Instruction execution in pipelined. CPS4200 System Programming- 2007 Spring

  31. 1.5 (RISC) Machine • I/O • A range of memory location is logically replaced y device registers. • Each I/O has a unique address, or set of addresses, assigned to it. • When a load or store instruction refers to this device register area of memory, the corresponding device is activate. CPS4200 System Programming- 2007 Spring

  32. Homework #1Due 1/30/07 • Homework: p. 40 • Write a sequence of instructions for SIC to set ALPHA equal to the product of BETA and GAMMA. Assume that ALPHA, BETA, and GAMMA are defined as in Figure 1.3(a). • Write a sequence of instruction for SIC/XE to set ALPHA equal 4*BETA-9. Assume that ALPHA and BETA are defined as in Figure 1.3(b). Use immediate addressing for the constants • Write a sequence of instructions for SIC/XE to clear a 20-byte string to all blanks. Use immediate addressing and register-to-register instructions to make the process as efficient as possible. CPS4200 System Programming- 2007 Spring

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