Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling

1. Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling Puneet Gupta Andrew B. Kahng Univ. of California, San Diego Work partially supported by MARCO GSRC

2. Outline • Motivation • Crosstalk Avoidance: Previous Methods • Crosstalk Analysis: Switch Factors • Key Idea: Arrival Time Displacement • Swizzling • Experiments and Results • Conclusions

3. Motivation • Capacitive coupling between on-chip wires is becoming more significant! • Wire spacing is shrinking • Wire height is not shrinking • Crosstalk between digital wires effectively causes a propagation delay • This delay is becoming a larger percentage of the clock period, and may become a limiting factor for clock speed h C  h/s s

4. Crosstalk Induced Delay W1 • Longest delay when adjacent signals transition in opposite directions • Shortest delay when victim and aggressor transition in the same direction Victim C1 C Aggressor C2 W2

5. Crosstalk Avoidance: Previous Methods • Shielding • Pwr/Gnd wire routed next to switching victim • Track Permutation • Routing segments within a switchbox permuted to maximize minimum slack • Wire Spacing • Victim-aggressor spacing increased to decrease coupling capacitance • Repeater Staggering • Repeater locations in long parallel wires offset such that worst-case coupling does not occur for more than half the length of bus

6. Crosstalk Analysis: Switch Factors  SF depends on relative arrival times and slew rates • Ceq = SF £ CC • Proposed by Kahng et al (DAC’00) and Chen et al (ICCAD’00)

7. Key Idea: Arrival Time Displacement • Nominal coupling can be obtained from worst-case coupling by delay element insertion • Delay element = dogleg in routing • Swizzling: Misalign arrival times of parallel wires by permuting them  reduce worst-case delay and delay uncertainty due to capacitive coupling Victim Victim Aggressor Aggressor SF=2 SF=1

8. Swizzling • Swizzling: permutation of n long parallel wires • Permutation in swizzle-groups of size k • E.g., for n=16, k=2/4/8/16 • Swizzle-set : set of swizzles such that all adjacencies in swizzle-group are realized • E.g., {1234, 2413} for k=4 • Contains k/2 swizzles • i-j compliant: wires i and j adjacent • E.g., 1234 is 2-3 compliant • Objectives: • Minimum delay uncertainty • Minimum layout overhead

9. Routing Swizzles • Example routing of swizzle set {1234, 2413} • 8 vias and some wrong direction routing • All adjacencies are realized • Swizzle-pattern • Consists of two swizzle-sets • Example: 1234, 2413, 4321, 3142 • All adjacencies realized exactly twice • Repeat through the length of the bus

10. General Pattern Construction • General pattern construction for swizzle-set of size k • Exact permutation expressions given in paper • Every wire couples to every other wire for the equal distance • Between any two i-j compliant permutations wires i,j travel (k-1)d vertical distance • E.g., 1234, 2413, 4321 • Layout overhead of a swizzle-set • k(k-1)d vertical routing • 2k2 vias • Some non-preferred direction routing • Another example: {123456, 241635, 462513, 654321, 536142, 315264} i-j compliant: 3d distance traveled by all wires

11. Swizzling: Impact on Worst-Case Delay • For designated victim r • Assume all other wires transition in opposite direction • SF(per aggressor) for r ranges from 1 to 3 in all swizzles • SF for all other i ranges from -1 to 1 except in i-r compliant permutations • Relative arrival and slew times of i and r change between two i-r compliant permutations Larger SF Smaller SF Constant SF

12. Swizzling: Impact on Worst-Case Delay • With swizzling worst-case coupling can not be preserved along the entire length of the bus • For switching probability A the chance of worst-case delay decreases from A(A/2)2to A(A/2)k-1 • The best-case delay (all wires in bus) switching in the same direction is relatively unaffected

13. Delay Model • Divide interconnect into n segments. • Elmore Delay at kthsegment is given by • Iterate with a convergence criterion • Runtime: 0.27s for HSpice vs 0.005s for our approach

14. Experimental Testbed • 2mm long global interconnect • ITRS 130, 90, 65nm technologies • Load assumed to be 50fF • Swizzle groups of size 4 and 6 • Initial slew rates assumed not to differ by more than 100%

15. HSpice Calculated Swizzling Impact • As an example at 130nm, swizzle-set of size 4 • HSpice too computationally expensive  use the simple iterative delay model

16. Results: Worst-Case Delay • More swizzles • more arrival time displacement  less worst-case delay • Additional wire and vias  more worst-case delay

17. Results: Routing Overhead Example at 130nm node for swizzle-set size 4 and 6

18. Conclusions • Swizzling: a pure routing solution to crosstalk induced delay uncertainty • Peak reductions in worst-case delay • 130nm: 31.5% • 90nm: 25.8% • 65nm: 25% • Peak reductions in delay uncertainty • 130nm: 33.7% • 90nm: 32% • 65nm: 34% • Large enough delay benefit can lead to reduction in no. of repeaters  via increase can be compensated

19. Future Work • Sensitivity of the swizzling results to minor perturbations in locations of swizzles (as due to routing obstacles) • Formal analysis of worst-case delay impact of swizzling and computing optimal number of swizzles