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Weichi Hu , Chun Cheng Lin, Liang Yu shyu

An Implementation of a Real-Time and Parallel Processing ECG Features Extraction Algorithm in Field Programmable Gate Array (FPGA). Weichi Hu , Chun Cheng Lin, Liang Yu shyu. m 5151117 Yumiko Kimezawa. Outline. Introduction Method and material Result Conclusion. Introduction.

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Weichi Hu , Chun Cheng Lin, Liang Yu shyu

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  1. RPR An Implementation of a Real-Time and Parallel Processing ECG Features Extraction Algorithm in Field Programmable Gate Array (FPGA) WeichiHu, Chun Cheng Lin, Liang Yu shyu m5151117 Yumiko Kimezawa

  2. Outline RPR • Introduction • Method and material • Result • Conclusion

  3. Introduction RPR • Toimprove the accuracy of prediction for ECG waveform classification • Many methods of the principle component analysis(PCA) • Adaptive resonance theory (ART) • Wavelet neural network (WNN) • Fuzzy neural network (FNN) • Creating hybrid classification systems • To increase the accuracy of ECG features prediction Among these methods But Better using post and offline processes

  4. Introduction RPR • For a homecare ECG monitoring device • It is important to extracting the features of the ECG signal in real-time • The objective • - Reporting a successfully development of real-time ECG features extraction algorithm that could be implemented using FPGA

  5. Method and material RPR • Algorithm will be analyzing • The component of the ECG signals • Information in real-time for identifying the abnormal rhythm and heart beat • The programmed System on Chip (SoC) using FPGA • Control of the detection and digitalizing ECG • Analyzing and extracting feature of ECG • Monitoring the information update to the LCD • Interfacing with USB and flash memory • Input • - The ECG data from MIT-BIH database

  6. Method and material RPR PC for storage and display ECG MIT-BIH Database LCD real-time display ECG signal USB serial transmission USB serial transmission FPGA system for computing and peripheral device control FLASH for storage database and real-time analysis AD conversion circuit FLASH for ECG signal storage LCD display database and ECG signal ECG analog capture circuit Fig. 1: The process of prototyped system

  7. Method and material RPR PC for storage and display ECG MIT-BIH Database LCD real-time display ECG signal USB serial transmission USB serial transmission FPGA system for computing and peripheral device control FLASH for storage database and real-time analysis AD conversion circuit The real-time ECG acquired and digitalized data could be input to the prototyped system directly FLASH for ECG signal storage LCD display database and ECG signal ECG analog capture circuit Fig. 1: The process of prototyped system

  8. Method and material RPR PC for storage and display ECG MIT-BIH Database LCD real-time display ECG signal Result USB serial transmission USB serial transmission FPGA system for computing and peripheral device control FLASH for storage database and real-time analysis AD conversion circuit By user selection FLASH for ECG signal storage LCD display database and ECG signal ECG analog capture circuit Fig. 1: The process of prototyped system

  9. Method and material RPR Flash memories The acquired ECG LCD display USB com. ECG amplifier Control button LCD display

  10. Method and material RPR • For the real-time ECG feature extractiona pipelined has been setup within the FPGA • The pipelined buffer • FIFOs buffer to control the data flow and timing sequence • The ECG feature detection • Starting from recognizing the R-peak • The registered R-peak will look for P wave and Q wave • The same signal will be triggered modules to look for from previous heart beat • S wave and the start of T wave • End of T wave

  11. Result RPR The performance of algorithm was tested and validated The result from FPGA Annotated database result (Correct data) The result from MATLAB

  12. Result RPR • Overall average R-peak timing detection difference against the annotated data (250Hz) • FPGA • 0.25±0.45 sampling point • MatLab procedure • 0.3±0.47 sampling point

  13. Result RPR • Overall average Q-peak timing detection difference against the annotated data (250Hz) • FPGA • -0.25±1.74 sampling point • MatLab procedure • 4.5±1.31 sampling point

  14. Result RPR • Overall average T-peak timing detection difference against the annotated data (250Hz) • FPGA • 0.52±0.69 sampling point • MatLab procedure • 1.05±0.4 sampling point

  15. Result RPR Standard error Fig. 5: The panel was displaying a real-time ECG of a volunteer difference Fig. 6: The static graph were showing the difference of the extracted features for the 10 min. of data The fig. shows the average sampling points different for the interval of RR, PR, QT and QRS duration

  16. Conclusion RPR • The objective is developing an algorithm for processing the ECG signals and implementing it using the FPGA • The performance of algorithm was tested using MATLAB and validated based on the MIT-BIH Arrhythmia database • This overall detection tolerance of the algorithm was 0.02 seconds

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