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Pair Monitor の基本設計

Pair Monitor の基本設計. ’07 6/29 田窪洋介. Pair monitor. GLD detector. Pair monitor • Detector size : 16cm diameter • Detector candidate : 3D pixel sensor  Pixel size : 400 μ m x 400μ m  Thickness : 200 μ m  Bump-bonded with readout ASIC • Located at 400cm from IP. e +. e +. e －.

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Pair Monitor の基本設計

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  1. Pair Monitorの基本設計 ’07 6/29 田窪洋介

  2. Pair monitor GLD detector Pair monitor • Detector size : 16cm diameter • Detector candidate : 3D pixel sensor  Pixel size : 400μm x 400μm  Thickness : 200μm  Bump-bonded with readout ASIC • Located at 400cm from IP e+ e+ e－ Pair monitor Polyethylene mask layer

  3. Pair monitorの概念図 Pair monitorの検出器部分 Pair monitorの外観 8cm Extraction beam pipe 1cm 1.8cm Injection beam pipe total no. of pixels = 2.6 x 105 (2 Pair monitors) cost/pixel= 2,000 Yen, the total cost =5.2 Oku-Yen

  4. Readout ASIC Prototype of readout ASIC Readout ASIC • Count a number of hit • Produced with 0.25μm process • Size : 4 x 4 mm2 • Readout cell size : 400 x 400 μm2 • # of pixel : 36 (6 x 6) 4mm 4mm Readout cells

  5. Concept of readout ASIC system FPGA/4-ASIC on VME Readout board Readout ASIC Sensor 8bit data 36ch Operation signal 36ch Computer 36ch 36ch total no. of ASIC = 7,200 ; total no. of FPGA = 1,800 ( 2 Pair monitors ) cost/FPGA= 50,000 Yen; FPGA cost = 0.9 Oku-Yen other cost (PC, VME system etc.) = 0.5 Oku-Yen total readout system cost = 1.4 Oku-Yen

  6. Summary of cost estimation 3D Pixel device = 5.2 Oku-Yen Readout system (ASIC, VME, PC) = 1.4 Oku-Yen Total cost = 6.6 Oku-Yen

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