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Explore the architecture, design decisions, and state-of-the-art in sensor network processors. Learn about low-power requirements, specialized applications, event-driven processing, and the SNAP/LE processor. Discover the future prospects for extended sensor lifespan and environmental power harvesting.
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System Architecture of Sensor Network Processors Alan Pilecki
Outline • What is a Sensor Network? • What are the requirements of a processor in a Sensor Network? • What design decisions have been made based on these requirements? • What is the current state of the art in this field? • What does the future hold?
Sensor Networks (1) • Designed for specialized applications including: • Habitat monitoring • Implanted medical devices (e.g. heart monitor) • Military detection systems
Sensor Networks (2) • Hardware • Specialized processors/coprocessors • Radio Transceiver • Sensor (e.g. audio, infrared, temperature, vibration, etc.)
Requirements • Low power consumption = Long life span • Self-powered • Battery • Power harvested from environment (e.g. solar power, vibration, electro-magnetic radiation) • Small in size • Very reliable / no maintenance
Low Power Consumption • This is the main driving force for the design of a sensor processor. • Ultimate goal is for a deployed sensor node to provide continuous sensing for years without being touched. • Decisions made to save power may result in slower CCT, acceptable as long as specialized applications need is met.
Common characteristics (1) • Event Driven • Event execution/queue implemented entirely in HW, eliminating need for OS. • Accelerates processing and dispatching of events.
Common Characteristics (2) • Modularized specialized hardware. • Accelerate common operations. • Easily expandable. • Allows for more power saving options. • Majority of HW is put to sleep when not actively sensing. • Quick wakeup time.
SNAP/LE (1) • Sensor Network Asynchronous Processor / Low Energy • Asynchronous processor • No clock for sequencing in any component. • Synchronization done with a handshaking protocol between hardware components. • Results in extra hardware (Async overhead). • Every signal must be without glitches or switching hazards (no clock to help recover). • Results in much lower power consumption.
SNAP/LE (2) • Processor Core • Event queue • Instruction fetch • Lookup table to map events to their specific handlers. • ISA • As simple as possible • Main purpose is to execute event handlers.
SNAP/LE (3) • Time coprocessor • 3 self-decrementing timers. • Used to wake up the system to check the state of the sensor environment. • Message coprocessor • Interface between processor core and the external HW (radio and sensor).
Features of other Sensor Processors (1) • Hardware power leakage • Older technology is used in a lot of cases to minimize inactive power leakage. • Memory power saving: • SRAM divided into banks of 256 bytes. • Unused portions of memory are gated. • Reduces active and leakage power. • Resulting in over a 98% power reduction.
Features of other Sensor Processors (2) • Event priority levels • Two inputs to the event scheduler. • High priority events can pre-empt low priority events. • General Purpose Processor • Used for uncommon operations. • Gives programmer more flexibility. • Consumes much more power than specialized processors.
What does the future hold? • Increase lifespan of sensors • Improved battery life (slow developing and expensive) • Harvesting power from the environment • Sensors that can run for long periods of time by recharging their power source from their surroundings. • Will open up the use of sensors to other fields/applications.
