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RHINO as a Cognitive Radar Platform. Amit K. Mishra, Alan Langman , Mike Inggs Department of Electrical Engineering University of Cape Town. Plan of the presentation. RHINO ( some updates ) Cognitive Radar Feature matching UCT's Rhino Radar going CogRAD. RHINO.
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RHINO as a Cognitive Radar Platform Amit K. Mishra, Alan Langman, Mike Inggs Department of Electrical Engineering University of Cape Town
Plan of the presentation • RHINO (someupdates) • CognitiveRadar • Featurematching • UCT'sRhino Radar goingCogRAD
RHINO • Reconfigurable Hardware Interface for Computing & Radio • Inspired by ROACH • Low-cost and for software defined radio use • History: • Feb 2010: Start of RHINO (inspired by ROACH) • Dec 2010: First 4 Rhino prototypes received • Dec 2010: Processor booting from SD Flash • Jan 2011: FPGA up and running • Feb 2011: Almost all peripherals have been tested • March 2011: Borph/Linux is ported • May 2011 2: new Rhino V1.1 fab'd • July 2011: Linux ecosystem gathering tools at www.borph.org • August 2011: Brandon updates Borph to Linux 3.1 RC 1! • October 2011: working FMC 150 board
RHINO: key features • FPGA Subsystem • Spartan6 FPGA, XC6SLX150T-2FGG676C • 676-pin package, 150K logic cells, 180 DSP48A1 slices, 8 GTP transceivers, 4 integrated DDR3 Memory Controllers • Dual DDR3 x 16 memory • Micron DDR3-1066, upto 512MB, upto 25.6Gbps total bandwidth • Dual FMC-LPC Vita 57.1 IO expansion • Dual CX4 10Gbps IO • Supports 10Ge,Infiniband, XUAI, copper-to-fibre adaptors • Processor Subsystem • Texas Instrument Sitara AM3517ZCN ARM Cortex A8 processor (600MHz) • Designed specially to be an effective master for data and control signal handling among many peripherals and slaves (in PROFI bus) • Dual DDR2 upto 256MB, 10Gbps bandwdith • Upto 256MB NAND flash memory • USB Host, USB on the go, SD Card, HDMI, Audio (in/out) • Support booting off USB drive, flash memory or SD card • JTAG openocd debugger support through FDTI device • Dual serial port via USB • 100Mbs Ethernet with IEEE 1588 PTP support (sync to within 10ns) • FPGA/Processor Link • 16 bit bus, upto 1.3 Gbps(WISHBONE) • Select Map Configuration( device configuration within 1s) • Support FPGA ICAP interface via processor bus
Cognitive radar • Cognition: aware, learns & make ‘new’ decisions • Bio-inspired (why?) • Use: in almost every field • Emerging as an area of interest or worry (!) in RA! • With cognitive radio (if these gets mass produced), the RFI interference will increase substantially
Architecture that may give rise to cognition (inspired by prefrontal cortex; proposed by Fuster)
Implementing CogRad: demands • Sensor management • Waveform diversity (Tx, action) • Change in ADC sampling (Rx, motor) • Architecture • Levels of memory • Levels of processing
Mapping of needs and features • On the fly control on i/o interfaces • FMCs • Quick access to external memory • Ethernet connections • Remote timing • IEEE 1588 interface • Levels of processing and memory • Powerful FPGA+DDR-RAM • Data and power signal control • ARM processor
Acknowledgements • UCT University Research Committee. • SANDF Project Ledger. • SKA South Africa. • Hard working students.