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GUSTECH presents:

GUSTECH presents:. A micro-Course on SPI 4 Ultra-320. Ultra-320 Topics. Overview of U320 & T10 Documents Inquiry Information PPR Message & Negotiation Details Physical Interface Enhancements A few details on Training & Flow Control Information Units Update A few Mode Pages.

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GUSTECH presents:

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  1. GUSTECHpresents: A micro-Course on SPI 4 Ultra-320

  2. Ultra-320 Topics • Overview of U320 & T10 Documents • Inquiry Information • PPR Message & Negotiation Details • Physical Interface Enhancements • A few details on Training & Flow Control • Information Units Update • A few Mode Pages Assumes working knowledge of all prior SCSI technology Micro-Course on Ultra320; GUSTECH; v4 July 2003

  3. Doubles transfer rate of U160 (SPI-3) via: Bus signaling enhancements Implementation of Information Units and addition of optional Read Streaming Implementation of Quick Arbitration Many others Project 1365D This document is based upon SPI-4, revision 10; 6 May 02 Also refer to SAM, SPC, and appropriate Device Specific Command Documents U320 Main Features & T10 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  4. SPI-4 Version Descriptor Codes: 0B40 no version claimed 0B56 ANSI INCITS.362.200x 0B54 T10/1365D rev 7 0B55 T10/1365D rev 9 0B59 T10/1365D rev 10 Inquiry Information“Who are you & what do you do?” Reference SPC-3, rev. 8, tables 57 & 63 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  5. ADDR16=1 supports ID[15:0] WBUS16=1 supports DB:15:0] SYNC=1 supports synchronous data transfers CLOCKING=11 supports both ST & DT transfers QAS=1 supports Quick Arbitration and Selection IUS=1 supports Information Unit transfers Inquiry Information“Who are you & what do you do?” Reference SPC-3, rev. 8, tables 64, 65 & 66 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  6. Parallel Protocol Request Remember: REQ/ACK OFFSET = 0 means Asynchronous Remember: DT is WIDE only, always Reference SPI-4, rev. 10, table 71 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  7. Precompensation enable Retain training information Read streaming and read flow control enable Write flow control enable Hold margin control settings QAS enable request DT clocking enable request Information units enable request Parallel Protocol Request details Reference SPI-4, rev. 10, table 9 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  8. Precompensation enable=1 (set by “OTHER” SCSI device) indicates that the device receiving this bit set to ‘1’ should enable its Precompensation Transmitters (CONTROL BIT) Retain training information=1 device can save Training Information and the Target does NOT need to retrain on each connection Read streaming and read flow control enable=1 Target should enable read streaming and read flow control Write flow control enable=1 Target should enable write flow control during write streaming Parallel Protocol Request details Reference SPI-4, rev. 10, sections 4.12.4.6.6 through 4.12.4.6.9 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  9. Hold Margin Control Settings=1 target should hold any margin control settings with the margin control subpage of the port control mode page QAS enable request=1 is a request that Quick Arbitration and Selection be enabled DT clocking enable request=1 is a request that DT clocking be enabled Information Units enable request=1 is a request that Information Unit Transfers be enabled Parallel Protocol Request details Any change in the negotiated state of IU_REQ, the target shall: Abort all tasks for that initiator and go to BUS FREE phase Reference SPI-4, rev. 10, sections 4.12.4.6.2 through 4.12.4.6.5 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  10. VALID Combinations when Transfer Period=08h: PCOMP_EN = 0 or 1; RTI = 0 or 1; RD_STRM = 0 or 1; WR_FLOW = 0 or 1; HOLD_MCS = 0 or 1; QAS_REQ = 0 or 1; DT_REQ=1; IU_REQ=1 Parallel Protocol Request details Any change in the negotiated state of IU_REQ, the target shall: Abort all tasks for that initiator and go to BUS FREE phase Remember: DT is WIDE only, always Remember: REQ/ACK OFFSET = 0 means Asynchronous Reference SPI-4, rev. 10, table 11 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  11. 20h 39h DEh 05h 15h 3Ch F7h 69h pre-U320 Data Clocking DB[7-0], driven by Target or Initiator Single Transition Data Phase on Narrow Bus P0 = Odd Parity REQ or ACK DB[15-0], driven by Target or Initiator Double Transition Data Phase on Wide Bus with CRC “available” 9683h 31D0h 03FBh 9655h 6931h fill CRC CRC P_CRCA = parity or CRC Available REQ or ACK DT DATA INshown U160’s Data Group Transfers example Reference SPI-4, rev. 10, figure 5 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  12. Double Transition PACING View at the transmitting device 80MHz 12.5nS DB[15-0], driven by Target or Initiator 6.25nS REQ or ACK It is up to the receiving device to “adjust” all signals to match synchronous DT DATA waveforms as depicted on the bottom of slide 11 Let’s see how this is made possible… Reference SPI-4, rev. 10, figure 8 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  13. REQ or ACK “any” DBx “any” DBy “any” DBz REQ or ACK “any” DBx “any” DBy “any” DBz Double Transition PACING details Waveforms View at the transmitting device View at the receiving device Signal rounding Amplitude reduction Signal skew Micro-Course on Ultra320; GUSTECH; v4 July 2003

  14. CRC Optional Signal Adjustment Buffer Data mux Skew Compensation LVD Transmitters Clock Shifter mux Receivers Precompensated Drivers Buffer Double Transition PACINGdetails Playing Pieces This is only a partial model; not actual circuitry SCSI Bus Transmitting SCSI DEVICE Per signal line: If changing states (0 to 1, or 1 to 0) then use “strong” drive; if not changing states, use “weak” drive Receiving SCSI DEVICE Reference SPI-4, rev. 10, figure 9 & Table 32 for Precompensation “open loop compensation” Micro-Course on Ultra320; GUSTECH; v4 July 2003

  15. REQ or ACK “any” DBx REQ or ACK “any” DBx “any” DBy “any” DBy “any” DBz “any” DBz Double Transition PACING details Waveform Restoration Tuned with “training” Receiver Equalization with Filtering Adaptive Active Filter Adjustable, Closed-loop amplifier followed by a Steep-rolloff Low-pass filter Skew Compensation Clock Shift Reference SPI-4, rev. 10, figure 10 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  16. SEL ALL & REQ 200nS = 32 transfers 200nS 800nS = 128 transfers If PCOMP_EN = 1; strong drive… If PCOMP_EN = 1; still strong drive… REQ ALL 100nS 300nS = 48 transfers Double Transition PACING details DT DATA IN: Initiator’s Receiver Training Signal group “ALL”= P_CRCA, P1 & DB[15:0] Section A Training: DOG lines = DT Data IN Section B Training: Since the “ALL” signals are repeating as: 11001100110011… the precompensation drivers will be alternating between strong & weak Section C Training: REQ P1 DB[15:0] & P_CRCA Repeating pattern: 0000010011111011… P1 “phase change” will signal valid data Total of 8 sets of patterns (only 5 shown) 800nS = 128 transfers Reference SPI-4, rev. 10, Section 10.7.4.2.2 NOTE: See section 10.7.4.2.3 for DT DATA OUT phase training technique Micro-Course on Ultra320; GUSTECH; v4 July 2003

  17. Double Transition PACING details Flow Control • P1 is now used to indicate the change of the data validity state by reversing the phase (appears as a lack of a change in state) of the (normally free running) P1 coincident with REQ or ACK assertion edges (slide 18 example) • P_CRCA asserts when the current SPI data stream IU is the last SPI data stream IU of the current read or write stream • Read flow control is mandatory if the optional read streaming is enabled (RD_STRM=1). The mandatory write streaming uses write flow control if enabled (WR_FLOW=1) Reference SPI-4, rev. 10, Sections 10.7.4.3.1 & 4.11.3.3 & table 39 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  18. REQ P1 DB[15:0] End of “training” See end of slide 16 P1 “phase change” will signal valid data P1 “phase change” will signal valid data P1 “phase change” will signal invalid data P1 “phase change” will signal invalid data Double Transition PACING details DT DATA IN: P1 Data Validity Signaling ex. Reference SPI-4, rev. 10, Section 10.7.4.3.1, & Figure 79 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  19. Double Transition PACING details • Have explored just some of the techniques used to ensure the highest signal quality possible • U320 uses CRC32 data integrity checking at the end of each Information Unit to verify the information is correct Micro-Course on Ultra320; GUSTECH; v4 July 2003

  20. Bit: 15 8 7 0 15 8 7 0 DATA Transmission Byte 1 Byte 0 Byte 3 Byte 2 Wide Bus Bit: 31 24 23 16 15 8 7 0 Byte 0 Byte 1 Byte 2 Byte 3 time Bit: 7 0 7 0 7 0 7 0 Bit-Swap on Byte Boundaries Bit: 31 24 23 16 15 8 7 0 Byte 0 Byte 1 Byte 2 Byte 3 CRC Calculation on 32-bit Boundaries Bit: 0 7 0 7 0 7 0 7 CRC Generation followed byBit (1’s complement) Inversion Bit: 31 24 23 16 15 8 7 0 CRC 0 CRC 1 CRC 2 CRC 3 Bit: 0 7 0 7 0 7 0 7 Bit-Swap on Byte Boundaries Bit: 31 24 23 16 15 8 7 0 CRC 0 CRC 1 CRC 2 CRC 3 Bit: 7 0 7 0 7 0 7 0 CRC Transmission Bit: 15 8 7 0 15 8 7 0 End of Data CRC 1 CRC 0 CRC 3 CRC 2 Wide Bus Cyclic Redundancy Check Reference SPI-4, rev. 10, Figure 80 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  21. Total Bytes Data Pattern Sent in Data Group Word 1 CRC Word 2 CRC 32 00h, 00h for all words 55ADh 190Ah 32 FFh, FFh for all words AB0Bh FF6Ch 32 00h, 01h, 02h, 03h, 04h, ..., 1Fh 7E8Ah 9126h Cyclic Redundancy Check CRC Test Cases: The 32-bit generator polynomial used, that equals 104C11DB7h is: x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1 The 32-bit unique remainder, that equals C704DD7Bh is: x31 + x30 + x26 + x25 + x24 + x18 + x15 + x14 + x12 + x11 + x10 + x8 + x6 + x5 + x4 + x3 + x + 1 Reference SPI-4, rev. 10, Section 11.3.4 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  22. Quick Arbitration • Optional method of transferring SCSI bus control without an intervening BUS FREE • Three step process for implementation: • Discovery of support of QAS (Inquiry CDB & Data) • Negotiation for QAS usage (PPR MSGs OUT & IN) • Execution of QAS via QAS REQUEST message IN and the new & very unique protocol • Saves approximately 2uS of overhead per unique I/O process • Targets “shall” implement the Fairness Algorithm (see Appendix B) • Problems include “bus starvation” Reference SPI-4, rev. 10, Section 10.4.3 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  23. Quick Arbitration “logic” levels depicted QAS REQUEST actuates disconnection of T=6 from I=7 T0, T2, & T5 Arbitrating T5 wins quick Arbitration HiZ DB[7-0]T6 55h = QAS REQUEST 25h 20h Normal RESEL phase follows after 1uS delay 90nS min, 200nS max T0 & T2 release Within 200nS 90nS max ? nS REQT6 HiZ 1uS min Decide winner 90nS min ACKI7 HiZ ? nS “DOG”T6 90nS max MSG IN Phase HiZ HiZ BSYT6 DT DATA Phase T6 releases Within 200nS HiZ SEL T5 drives SEL REQ & ACK not shown for brevity and extreme simplification Reference SPI-4, rev. 10, Section 10.4.4 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  24. Information Units PACKETIZED SCSI • Method of transferring SCSI bus Information using negotiated Synchronous Transfer rates and Wide bus widths (“shall” use for Pacing U320) • Three step process for implementation: • Discovery of support of IU (Inquiry CDB & Data) • Negotiation for IU usage (PPR MSG OUT & IN) • Execution of Information Units phases using DT DATA IN and DT DATA OUT phases Micro-Course on Ultra320; GUSTECH; v4 July 2003

  25. Packetized SCSI details • Four types of SPI Information Units: • L_Q = contains L_Q NEXUS information for existing I_T NEXUS and is always paired with one of the following: • COMMAND = single, last or multiple commands with task attributes and management flags (messages) for unique I_T_L_Q NEXUS; • DATA = DT DATA IN, DT DATA OUT, DT STREAM DATA IN, and DT STREAM DATA OUTfor unique I_T_L_Q NEXUS; • STATUS = auto-sense data with status, and packetized failure codes for unique I_T_L_Q NEXUS. Section 14.3.2 Section 14.3.1 Section 14.3.3 Section 14.3.4 Section 14.3.5 Reference SPI-4, rev. 10, Section 14.1 & others cited above Micro-Course on Ultra320; GUSTECH; v4 July 2003

  26. Packetized SCSI more details SPI Information Unit “normal progression” EstablishI_T Nexus Arbitration/Selection Completes Nexus: I_T_L_Q Paired with: SPI L_Q IU SPI COMMAND IU Includes Task Attributes and Management Flags; single, multiple & last commands If more commands Paired with: SPI L_Q IU SPI DATA IU If more data Includes DATA IN and DATA OUT, STREAMING DATA IN, and STREAMING DATA OUT Paired with: SPI L_Q IU SPI STATUS IU If more data or status Includes “Auto-sense” = Error sense data, and Packetized failure codes NOTE: All four IU types terminate their transfers with iuCRC (described earlier), which can also occur at specified intervals in the transfers. Reference slide 20. Micro-Course on Ultra320; GUSTECH; v4 July 2003

  27. Packetized SCSI more details • After I_T NEXUS, “logical” connections, disconnections and reconnections are used, changing L_Q values as needed • Logical disconnections SHALL occur (back to just the I_T NEXUS) at the completion of any: • Each SPI command IU • Each SPI status IU • Each SPI data IU • Any SPI L_Q if data length = zero; and • The last SPI data stream IU • if there are no phase changes to MSG OUT or MSG IN • If a change to MSG IN or OUT occurs, then existing I_T_L_Q NEXUS is maintained Reference SPI-4, rev. 10, Section 14.2 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  28. Packetized SCSI more details SPI Information Unit Phase Sequences “overview” Slides 29 32 RESELECTION SELECTION DT DATA ARBITRATION MESSAGE OUT BUS FREE Hard Reset or Protocol Error MESSAGE IN Reference SPI-4, rev. 10, Figure 83 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  29. Packetized SCSI more details SPI Information Unit Sequence during initial connection SELECTION I_TNexus coming in SPI L_Q (always Init to Targ) (logical connect) BUS FREE Attention Condition SPI COMMAND (always Init to Targ) Can be many commands (unexpected physical disconnect) Reference SPI-4, rev. 10, Figure 85 I_T_L_Q Nexus remains in place I_T Nexus leaving (logical disconnect) MSG OUT MSG IN BUS FREE DT DATA IN Asynchronous Narrow (QAS or WDTR) (physical disconnect) I_T Nexus is gone here (to SPI L_Q/DATA or SPI L_Q/STATUS) Micro-Course on Ultra320; GUSTECH; v4 July 2003

  30. Packetized SCSI more details SPI Information Unit Sequence during data type transfers DT DATA IN from SPI STATUS or DATA DT DATA OUT from SPI COMMAND or DATA RESELECTION I_TNexus coming in SPI L_Q (always Targ to Init) (logical reconnect) Reference SPI-4, rev. 10, Figure 86 Attention Condition (data pointer restored) DT DATA OUT orDT DATA IN SPI DATA (data pointer saved) I_T_L_Q Nexus remains in place (logical disconnect) I_T Nexus leaving MSG OUT MSG IN DT DATA IN BUS FREE Initiator treats as having received a DISCONNECTMSGIN; I_T Nexus is gone here (physical disconnect) (to SPI L_Q/DATA or SPI L_Q/STATUS) Micro-Course on Ultra320; GUSTECH; v4 July 2003

  31. Packetized SCSI more details SPI Information Unit Sequence during data stream type transfers DT DATA OUT from SPI COMMAND or DATA DT DATA IN from SPI STATUS or DATA RESELECTION I_TNexus coming in SPI L_Q (always Targ to Init) (logical reconnect) Attention Condition (data pointer restored) DT DATA IN or OUT Reference SPI-4, rev. 10, Figure 87 SPI DATA (data pointer saved) I_T_L_Q Nexus remains in place (logical disconnect) I_T Nexus leaving MSG OUT MSG IN DT DATA IN BUS FREE (physical disconnect) (to SPI L_Q/DATA or SPI L_Q/STATUS) I_T Nexus is gone here Micro-Course on Ultra320; GUSTECH; v4 July 2003

  32. Packetized SCSI more details SPI Information Unit Sequence during status transfers RESELECTION DT DATA OUT from SPI COMMAND or DATA DT DATA IN from SPI DATA MSG OUT I_T Nexus coming in SPI L_Q (always Targ to Init) (logical reconnect) Attention Condition Data Length = 0 (no status follows) (See Section 14.3.5) (data pointer restored) SPI STATUS (always Targ to Init) Reference SPI-4, rev. 10, Figure 88 I_T_L_Q Nexus remains in place I_T Nexus leaving (logical disconnect) MSG OUT MSG IN DT DATA IN BUS FREE (to SPI L_Q/DATA) (to QAS) (physical disconnect) I_T Nexus is gone here Micro-Course on Ultra320; GUSTECH; v4 July 2003

  33. Packetized SCSI more details SPI L_Q Information Unit Details Table 54 – SPI L_Q IU Table 55 – TYPE TAG is a 16-bit unsigned integer, (TAG Queue Number) iuCRC Interval is the length in bytes of the data to be sent before an iuCRC is transferred. If zero, then only one iuCRC shall occur at the end of the SPI Information Unit. Four levels of LUN are defined in SAM-2. Single level LUN (00-FF) is found in Byte 5. BIDI Direction: byte 16, bits 7 & 6: per SPI-4, rev. 10, table 56 *Length of IU that follows, including “per stream size”: Initiator’s “comand” data length is 14h 90h. Reference SPI-4, rev. 10, Section 14.3.2 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  34. Packetized SCSI more details SPI COMMAND and DATA Information Units Details Table 51 – SPI COMMAND IU Table 52 – Task Attribute NO untagged CDBs SPI DATA IU Tables 57 & 58 in SPI-4 Remainder of IU ignored if code is not 00h Table 53 – Task Management Flags Reference SPI-4, rev. 10, Sections 14.3.1 (command) & 14.3.4 (data) Micro-Course on Ultra320; GUSTECH; v4 July 2003

  35. Packetized SCSI more details SPI STATUS Information Unit Details Table 59 – SPI STATUS Information Unit Table 60 – Packetized Failures Field Table 61 – Packetized Failure Codes Reference SPI-4, rev. 10, Section 14.3.5 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  36. #02: Disconnect – reconnect page #18: Logical Unit Control page #19: Port Control page #01: Margin Control #02: Save training configuration value #03: Negotiated Settings #04: Report transfer capabilities #FF: Return all supported subpages Mode Pages for SPI-4 subPages Byte 0, Bit 6: SPF=1 for the Subpage format; subpage # is then in byte 1 Reference SPI-4, rev. 10, Section 18.1.1 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  37. Margin Control parameters include: Driver Strength, Driver Asymmetry, Driver Slew Rate, & Driver Precompensation. Saved Training Configuration parameters include 4byte values for each of: DB[15:0], P_CRCA, P1, BSY, SEL, RST, REQ, ACK, ATN, C/D, I/O, and MSG #01: Margin Control #02: Save training configuration value #03: Negotiated Settings #04: Report transfer capabilities #FF: Return all supported subpages Port Control Mode Page Reference SPI-4, rev. 10, Sections 18.1.4.2 & 18.1.4.3; & Tables 87 & 89 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  38. Negotiated Settings parameters include: Transfer Period Factor, Req/Ack Offset, Transfer width, protocol options, Transceiver mode, & Sent/Received PCOMP_EN flags Report transfer capabilities includes: Minimum transfer period factor, Maximum REQ/ACK Offset, Maximum transfer width exponent, and protocol option bits supported. #01: Margin Control #02: Save training configuration value #03: Negotiated Settings #04: Report transfer capabilities #FF: Return all supported subpages Port Control Mode Page Transceiver Mode: 00 = unknown; 01 = Singled Ended; 10 = Low Voltage Differential; & 11 = High Voltage Differential Reference SPI-4, rev. 10, Sections 18.1.4.4 & 18.1.4.5; & Tables 90 & 92 Micro-Course on Ultra320; GUSTECH; v4 July 2003

  39. A: Additions needed for LVD SCSI Drivers and Receivers B: SCSI Bus Fairness C: Nonshielded connector alternative 4 D: “warm” Plugging E: SCSI Cable Testing F: Simple Expander Requirements G: Expander Communication Protocol H: Connecting different widths I: Transmission lines for SE Fast- 20 J: Measuring SE pin capacitance K: SCSI ICONs L: Backplane construction guidelines M: SPI-4 SCSI-2 terminology mapping SPI-4 Annex List: Reference SPI-4 Micro-Course on Ultra320; GUSTECH; v4 July 2003

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