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Lecture 12: Computer Arithmetic

Lecture 12: Computer Arithmetic. Today’s topic Numerical representations Addition / Subtraction Multiplication / Division. 2’s Complement. 0000 0000 0000 0000 0000 0000 0000 0000 two = 0 ten 0000 0000 0000 0000 0000 0000 0000 0001 two = 1 ten …

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Lecture 12: Computer Arithmetic

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  1. Lecture 12: Computer Arithmetic • Today’s topic • Numerical representations • Addition / Subtraction • Multiplication / Division

  2. 2’s Complement 0000 0000 0000 0000 0000 0000 0000 0000two = 0ten 0000 0000 0000 0000 0000 0000 0000 0001two = 1ten … 0111 1111 1111 1111 1111 1111 1111 1111two = 231-1 1000 0000 0000 0000 0000 0000 0000 0000two = -231 1000 0000 0000 0000 0000 0000 0000 0001two = -(231 – 1) 1000 0000 0000 0000 0000 0000 0000 0010two = -(231 – 2) … 1111 1111 1111 1111 1111 1111 1111 1110two = -2 1111 1111 1111 1111 1111 1111 1111 1111two = -1 Note that the sum of a number x and its inverted representation x’ always equals a string of 1s (-1). x + x’ = -1 x’ + 1 = -x … hence, can compute the negative of a number by -x = x’ + 1 inverting all bits and adding 1 Similarly, the sum of x and –x gives us all zeroes, with a carry of 1 In reality, x + (-x) = 2n … hence the name 2’s complement

  3. The Bounds Check Shortcut • Suppose we want to check if 0 <= x < y • and x and y are signed numbers (stored in $a1 and $t2) • The following single comparison can check both conditions • sltu $t0, $a1, $t2 • beq $t0, $zero, EitherConditionFails • We know that $t2 begins with a 0 • If $a1 begins with a 0, sltu is effectively checking the second condition • If $a1 begins with a 1, we want the condition to fail and coincidentally, • sltu is guaranteed to fail in this case

  4. Sign Extension • Occasionally, 16-bit signed numbers must be converted • into 32-bit signed numbers – for example, when doing an • add with an immediate operand • The conversion is simple: take the most significant bit and • use it to fill up the additional bits on the left – known as • sign extension • So 210 goes from 0000 0000 0000 0010 to • 0000 0000 0000 0000 0000 0000 0000 0010 • and -210 goes from 1111 1111 1111 1110 to • 1111 1111 1111 1111 1111 1111 1111 1110

  5. Alternative Representations • The following two (intuitive) representations were discarded • because they required additional conversion steps before • arithmetic could be performed on the numbers • sign-and-magnitude: the most significant bit represents +/- and the remaining bits express the magnitude • one’s complement: -x is represented by inverting all the bits of x Both representations above suffer from two zeroes In 1’s complement,  to add numbers we need to first do binary addition, then add in a carry value.

  6. Arithmetic for Computers • Operations on integers • Addition and subtraction • Multiplication and division • Dealing with overflow • Floating-point real numbers • Representation and operations

  7. Integer Addition • Example: 7 + 6 • Overflow if result out of range • Adding +ve and –ve operands, no overflow • Adding two +ve operands • Overflow if result sign is 1 • Adding two –ve operands • Overflow if result sign is 0

  8. Integer Subtraction • Add negation of second operand • Example: 7 – 6 = 7 + (–6) +7: 0000 0000 … 0000 0111–6: 1111 1111 … 1111 1010+1: 0000 0000 … 0000 0001 • Overflow if result out of range • Subtracting two +ve or two –ve operands, no overflow • Subtracting +ve from –ve operand • Overflow if result sign is 0 • Subtracting –ve from +ve operand • Overflow if result sign is 1

  9. 1000 × 1001 1000 0000 0000 1000 1001000 Multiplication • Start with long-multiplication approach multiplicand multiplier product Length of product is the sum of operand lengths

  10. Multiplication Hardware Initially 0 • In every step • multiplicand is shifted • next bit of multiplier is examined (also a shifting step) • if this bit is 1, shifted multiplicand is added to the product

  11. Optimized Multiplier • Perform steps in parallel: add/shift • 32-bit ALU and multiplicand is untouched • the sum keeps shifting right • at every step, number of bits in product + multiplier = 64, • hence, they share a single 64-bit register • One cycle per partial-product addition • That’s ok, if frequency of multiplications is low

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