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16.317 Microprocessor Systems Design I

16.317 Microprocessor Systems Design I. Instructor: Dr. Michael Geiger Summer 2013 Lecture 4: Bit test/scan instructions Conditional execution Exam 1 Preview. Lecture outline. Announcements/reminders HW 3 due Friday, 7/19 Exam 1: Tuesday, 7/23 Review Arithmetic instructions

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16.317 Microprocessor Systems Design I

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  1. 16.317Microprocessor Systems Design I Instructor: Dr. Michael Geiger Summer 2013 Lecture 4: Bit test/scan instructions Conditional execution Exam 1 Preview

  2. Lecture outline • Announcements/reminders • HW 3 due Friday, 7/19 • Exam 1: Tuesday, 7/23 • Review • Arithmetic instructions • Logical, shift, and rotate instructions • Today’s lecture • Rotate examples • Bit test/scan instructions • Conditional execution • Exam 1 Preview Microprocessors I: Lecture 4

  3. Review: Arithmetic • Reviewed flags: CF, AF, SF, ZF, PF, OF • Addition instructions • ADD AX,BX  AX = AX + BX • ADC AX,BX  AX = AX + BX + CF • INC AX  AX = AX + 1 • Subtraction instructions • SUB AX,BX  AX = AX – BX • SBB AX,BX  AX = AX – BX – CF • DEC AX  AX = AX – 1 • NEG AX  AX = -AX = 0 - AX Microprocessors I: Lecture 4

  4. Review: Multiplication & division • Multiplication instructions • MUL (unsigned), IMUL (signed) • Result uses 2x bits of source • Source usually implied (AL/AX/EAX) • Division instructions • DIV (unsigned), IDIV (signed) • Implied source (AX, (DX,AX), (EDX,EAX)) 2x bits of specified source • Quotient/remainder split across result Microprocessors I: Lecture 4

  5. Review: Logical instructions • Logical instructions (AND/OR/XOR/NOT) • Basic shift instructions • Move value by <amt> bits; add 0s to left or right • CF = last bit shifted out • SHL <src>, <amt>: Move <src> to left • SAL exactly the same • SHR <src>, <amt>: Move <src> to right • Arithmetic right shift • Move value right by <amt> bits • Copy sign bit to fill remaining bits • CF = last bit shifted out • SAR <src>, <amt> Microprocessors I: Lecture 4

  6. Review: rotate instructions • Rotate instructions: bits that are shifted out one side are shifted back in other side • ROL <src>, <amt> or ROR <src>, <amt> • CF = last bit rotated • Rotate through carry instructions • CF acts as “extra” bit that is part of value being rotated • RCL <src>, <amt> or RCR <src>, <amt> Microprocessors I: Lecture 4

  7. Rotate example • Given AL = 43H, CL = 04H, and CF = 0, show the state of AL after each instruction in the sequence below: • ROR AL, 2 • ROL AL, CL • RCR AL, 3 • RCL AL, 4 Microprocessors I: Lecture 4

  8. Solution • Initially, AL = 43H = 010000112 • ROR AL, 2 • AL = 01000011 rotated right by 2 = 11010000 = D0H • CF = last bit rotated in = 1 • ROL AL, CL • AL = 11010000 rotated left by 4 = 00001101 = 0DH • CF = last bit rotated in = 1 Microprocessors I: Lecture 4

  9. Solution (cont.) • RCR AL, 3 • (AL,CF) = 00001101 1 rotated right by 3 = 01100001 1 • CF = 1, AL = 011000012 = 61H • RCL AL, 4 • (CF,AL) = 1 01100001 rotated left by 4 = 0 00011011 • CF = 0, AL = 000110112 = 1BH Microprocessors I: Lecture 4

  10. Bit Test Instructions • BT  Bit test • BTR  Bit test and reset • BTS  Bit test and set • BTC  Bit test and complement • Format of bit test instruction: BT(x) D,S • (S)  index that selects the position of the bit tested • (D)  Holds value tested • Operation: • Enables programmer to test bit in a value in register or memory • All  Save the value of the selected bit in the CF • BT  Leaves selected bit unchanged • BTR  Clears the bit (bit = 0) • BTS  Sets the bit (bit = 1) • BTC  Complements the bit (bit = ~bit) Microprocessors I: Lecture 4

  11. Bit Test Instructions • Example: • BTC BX,7 • Before execution • (BX) = 03F0H = 0000 0011 1111 00002 • After Execution • (CF) = bit 7 of BX = 1 • (BX) = 0370H = 0000 0011 0111 00002 Microprocessors I: Lecture 4

  12. Bit Scan Instructions • BSF  Bit scan forward • BSR  Bit scan reverse • Format of bit scan instructions: BS(x) D,S • (S)  Holds value for which bits are tested to be 0 • (D)  Index of first bit that tests as non-zero • Operation: • Enable programmer to test value to determine if all bits are 0 • BSF  Scans bits starting from bit 0 • Set ZF = 0 if all bits are found to be zero • Sets ZF = 1 when first 1 bit detected and places index of that bit into destination • BSR  Scans bits starting from MSB • Set ZF = 0 if all bits are found to be zero • Sets ZF = 1 when first 1 bit detected and places index of that bit into destination • Example: • BSF ESI,EDX  32-bits of EDX scanned starting from B0 • If EDX = 00000000  ZF = 0 (all bits zero) • If EDX = 00000001  ESI = 00000000, ZF = 1 (bit 0 is 1) • If EDX = 00003000  ESI = 0000000C, ZF = 1 (bit 12 is first bit set to 1) Microprocessors I: Lecture 4

  13. Example • Given initial state shown in handout • List all changed registers/memory locations and their values, as well as CF • Instructions • BT WORD PTR [02H], 4 • BTC WORD PTR [10H], 1 • BTS WORD PTR [04H], 1 • BSF CX, WORD PTR [0EH] • BSR DX, WORD PTR [09H] Microprocessors I: Lecture 4

  14. Example solution • BT WORD PTR [02H], 4 • Address = DS:02H = 21102H • Word at 21102 = 1010H = 0001 0000 0001 0000 • CF = bit 4 = 1 • BTC WORD PTR [10H], 1 • Address = DS:10H = 21110H • Word at 21110 = 001EH = 0000 0000 0001 1110 • CF = bit 1 = 1 • Complement bit 1 • Word at 21110 = 0000 0000 0001 1100 = 001CH Microprocessors I: Lecture 4

  15. Example solution (cont.) • BTS WORD PTR [04H], 1 • Address = DS:04H = 21104H • Word at 21104 = 0189H = 0000 0001 1000 1001 • CF = bit 1 = 0 • Set bit 1 • Word at 21110 = 0000 0001 1000 1011 = 018BH • BSF CX, WORD PTR [0EH] • Address = DS:0EH = 2110EH • Word at 2110E = 00FFH = 0000 0000 1111 1111 • Word is not zero  ZF = 1 • First non-zero bit (starting from bit 0) is bit 0  CX = 0000H • BSR DX, WORD PTR [09H] • Address = DS:09H = 21109H • Word at 2110E = 0000H = 0000 0000 0000 0000 • Word is zero  ZF = 0 • DX unchanged Microprocessors I: Lecture 4

  16. Compare Instructions • Compare 2 values; store result in ZF/SF • General format: CMP D,S • Works by performing subtraction (D) – (S) • D, S unchanged • ZF/SF/OF indicate result (signed values) • ZF = 1  D == S • ZF = 0, (SF XOR OF) = 1  D < S • ZF = 0, (SF XOR OF) = 0  D > S Microprocessors I: Lecture 4

  17. Example—Initialization of internal registers with immediate data and compare. Example: MOV AX,1234H ;Initialize AX MOV BX,ABCDH ;Initialize BX CMP AX,BX ;Compare AX-BX Data registers AX and BX initialized from immediate data IMM16  (AX) = 1234H  + integer IMM16  (BX) = ABCDH  - integer Compare computation performed as: (AX) = 00010010001101002 (BX) = 10101011110011012 (AX) – (BX) = 00010010001101002 - 10101011110011012 ZF = 0 = NZ SF = 0 = PL ;treats as signed numbers CF = 1 = CY AF = 1 = AC OF = 0 = NV PF = 0 = PO Compare Instructions- Example Microprocessors I: Lecture 4

  18. Condition codes • Conditional execution: result depends on value of flag bit(s) • Intel instructions specify condition codes • Condition code implies certain flag values • Opcodes written with cc as part of name • cc can be replaced by any valid code • Examples: CMOVcc, SETcc, Jcc • Specific examples: CMOVE, SETL, SETZ, JNE, JG Microprocessors I: Lecture 4

  19. Condition codes (cont.) • Testing overflow • O (OF = 1), NO (OF =0) • Testing carry flag • C (CF = 1) • NC (CF = 0) • Testing sign flag • S (SF = 1), NS (SF = 0) • Testing parity flag • P or PE (PF = 1) • NP or PO (PF = 0) Microprocessors I: Lecture 4

  20. Condition codes (cont.) • Testing equality/zero result • E or Z (ZF = 1) • NE or NZ (ZF = 0) • Signed comparison • L or NGE (SF XOR OF = 1) • NL or GE (SF XOR OF = 0) • LE or NG ((SF XOR OF) OR ZF = 1) • NLE or G ((SF XOR OF) OR ZF = 0) • Unsigned comparison • “Below”  less than,“above”  greater than • B, NAE (CF = 1) • NB, AE (CF = 0) • BE or NA (CF OR ZF = 1) • NBE or A (CF OR ZF = 0) Microprocessors I: Lecture 4

  21. Conditional move (CMOV) • Only in Pentium Pro & later • Perform move only if condition is true • Examples: • CMOVZ AX, [SI]  move if ZF == 1 • CMOVG EBX, EAX  move if greater than Microprocessors I: Lecture 4

  22. Byte Set on Condition Instruction • Byte set on condition instruction • Used to set byte based on condition code • Can be used for boolean results—complex conditions • General format: • SETcc D • cc = one of the supported conditional relationships Microprocessors I: Lecture 4

  23. Byte Set on Condition Instruction • Operation: Flags tested for conditions defined by “cc” and the destination in a register or memory updated as follows If cc test True: 000000012 = 01H  D If cc test False: 000000002 = 00H  D • Examples of conditional tests: SETE = set byte if equal  ZF = 1 SETC = set byte if carry  CF =1 SETBE = set byte if below or equal  CF = 1 +(or) ZF = 1 • Example: SETA AL = set byte if above if CF = 0  (and) ZF = 0 (AL) = 01H Otherwise, (AL) =00H Microprocessors I: Lecture 4

  24. Example • Show the results of the following instructions, assuming that • “A” = DS:100H = 0001H • “B” = DS:102H = 0003H • “C” = DS:104H = 1011H • “D” = DS:106H = 1011H • “E” = DS:108H = ABCDH • “F” = DS:10AH = DCBAH • What complex condition does this sequence test? • MOV AX, [100H] • CMP AX, [102H] • SETLE BL • MOV AX, [104H] • CMP AX, [106H] • SETE BH • AND BL, BH • MOV AX, [108H] • CMP AX, [10AH] • SETNE BH • OR BL, BH Microprocessors I: Lecture 4

  25. Example solution • Condition being tested: • To simplify, treat each word as a variable named “A” through “F” • ((A <= B) && (C == D)) || (E != F) • Source: http://www.arl.wustl.edu/~lockwood/class/cs306/books/artofasm/Chapter_6/CH06-4.html Microprocessors I: Lecture 4

  26. Exam 1 notes • Allowed • One 8.5” x 11” double-sided sheet of notes • Calculator • x86 instruction set (so far) provided for you • No other notes or electronic devices (phone, laptop, etc.) • Exam will be 1 hour • Covers all lectures through today Microprocessors I: Lecture 4

  27. Review: processor basics; ISA • Processor components • Microprocessor for computation • Input/output to communicate with outside world • Storage to hold code/data • Instruction set architecture • Defines how programmer interfaces with hardware • Operations generally fall into one of four groups • Data transfer: move data across storage locations • Arithmetic: add, subtract, etc. • Logical: AND, OR, shifts, etc. • Program control: jumps/branches/calls Microprocessors I: Lecture 4

  28. Review: ISA, storage • Instruction set architecture (cont.) • Operands: the data being operated on • How are the bits interpreted? (int, FP, signed/unsigned) • What size are they? (byte, word, etc.) • How do we reference operands? • Instruction formats: how instructions are encoded • Data storage • Registers • Small, fast set of on-chip storage (primarily for speed) • Referenced by name • Memory • Larger, slower set of storage (primarily for capacity) • Organized as hierarchy … • … but programmer references single range of addresses • Memory issues • Aligned data: address divisible by number of bytes • Endianness: 80x86 data is little endian Microprocessors I: Lecture 4

  29. Review: x86 & memory • More x86 memory specifics • Six segment registers: CS (code), SS (stack), DS, ES, FS, GS (data) • Each segment 64 KB, starts on 16B boundary • Lowest hex digit of 20-bit address = 0 • Logical address  SBA:EA • Examples: DS:SI, SS:SP, CS:IP, DS:1000H • Linear address: actual address within architected memory • Shift 16-bit segment register to left by 4 bits = SBA • Add 16-bit EA to SBA • Calculating EA • Direct addressing: EA = const • Register indirect: EA = reg • Only BP/SP use SS; others use DS by default • Based-indexed: EA = base reg. + index reg. • Register relative: EA = reg. + const • Base-relative-plus-index: EA = base reg. + index reg. + const. • Scaled-index: EA = register + (scaling factor * second register) Microprocessors I: Lecture 4

  30. Review: data& data transfer instructions • x86 data • Registers: access as 8-bit (e.g. AL, AH), 16-bit (AX), 32-bit (EAX) • Memory • Data size usually matches register • If not, explicitly specify (BYTE PTR, WORD PTR, DWORD PTR) • MOV: basic data transfer • Can use registers, memory, immediates • If segment reg. is destination, source must be register • MOVSX/MOVZX • Sign-extend or zero-extend register/memory value • XCHG • Exchange contents of source, dest Microprocessors I: Lecture 4

  31. Review: data transfer, arithmetic • LEA: load effective address • Calculate EA/store in register • Load full pointer (LDS/LES/LFS/LGS/LSS) • Load dest & segment register from memory • Reviewed flags: CF, AF, SF, ZF, PF, OF • Addition instructions • ADD AX,BX  AX = AX + BX • ADC AX,BX  AX = AX + BX + CF • INC AX  AX = AX + 1 • Subtraction instructions • SUB AX,BX  AX = AX – BX • SBB AX,BX  AX = AX – BX – CF • DEC AX  AX = AX – 1 • NEG AX  AX = -AX = 0 - AX Microprocessors I: Lecture 4

  32. Review: Multiplication & division • Multiplication instructions • MUL (unsigned), IMUL (signed) • Result uses 2x bits of source • Source usually implied (AL/AX/EAX) • Division instructions • DIV (unsigned), IDIV (signed) • Implied source (AX, (DX,AX), (EDX,EAX)) 2x bits of specified source • Quotient/remainder split across result Microprocessors I: Lecture 4

  33. Review: Logical instructions • Logical instructions (AND/OR/XOR/NOT) • Basic shift instructions • Move value by <amt> bits; add 0s to left or right • CF = last bit shifted out • SHL <src>, <amt>: Move <src> to left • SAL exactly the same • SHR <src>, <amt>: Move <src> to right • Arithmetic right shift • Move value right by <amt> bits • Copy sign bit to fill remaining bits • CF = last bit shifted out • SAR <src>, <amt> Microprocessors I: Lecture 4

  34. Review: rotate instructions • Rotate instructions: bits that are shifted out one side are shifted back in other side • ROL <src>, <amt> or ROR <src>, <amt> • CF = last bit rotated • Rotate through carry instructions • CF acts as “extra” bit that is part of value being rotated • RCL <src>, <amt> or RCR <src>, <amt> Microprocessors I: Lecture 4

  35. Review: bit test/scan, flag control • Bit test instructions • Check state of bit and store in CF • Basic test (BT) leaves bit unchanged • Can also set (BTS), clear (BTR), or complement bit (BTC) • Bit scan instructions • Find first non-zero bit and store index in dest. • Set ZF = 1 if source non-zero; ZF = 0 if source == 0 • BSF: scan right to left (LSB to MSB) • BSR: scan left to right (MSB to LSB) Microprocessors I: Lecture 4

  36. Review: compare • CMP D, S • Flags show result of (D) – (S) • Assumes signed computation • ZF = 1  D == S • ZF = 0, (SF XOR OF) = 1  D < S • ZF = 0, (SF XOR OF) = 0  D > S • Condition codes: mnemonics implying certain flag conditions Microprocessors I: Lecture 4

  37. Review: conditional instructions • Conditional move • Move performed only if condition is true • SETcc D • Sets single byte destination to 1 (01H) if condition true; all 0s (00H) if condition false • Can be used to build up complex conditions Microprocessors I: Lecture 4

  38. Final notes • Next time • Exam 1 • Reminders • HW 3 due Friday, 7/19 Microprocessors I: Lecture 4

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