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Some Issues in Implementing Differential Amplifiers with High R IN , BW, and ICMR Neeraj Keskar

Some Issues in Implementing Differential Amplifiers with High R IN , BW, and ICMR Neeraj Keskar Advisor: Prof. Gabriel A. Rincón-Mora Analog and Power IC Design Lab School of Electrical and Computer Engineering Georgia Institute of Technology April 06, 2006. Introduction.

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Some Issues in Implementing Differential Amplifiers with High R IN , BW, and ICMR Neeraj Keskar

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  1. Some Issues in Implementing Differential Amplifiers with High RIN, BW, and ICMR Neeraj Keskar Advisor: Prof. Gabriel A. Rincón-Mora Analog and Power IC Design Lab School of Electrical and Computer Engineering Georgia Institute of Technology April 06, 2006

  2. Introduction • Differential amplifiers with an accurate voltage gain can have the following requirements: • High-impedance sensed nodes High input impedance e.g., output voltage sensing through resistive divider • Wide variations in sensed DC voltage High ICMR e.g., current sensing applications • High frequency signals High bandwidth e.g., boundary control applications • High sensing accuracy Feedback for accurate gain e.g., current sensing • The following slides look at some implementations

  3. Sensing High Impedance Nodes • Gain resistors load VS • Effective VOS between VREF and VS • To reduce loading: R >> RS • Sensed node is buffered to eliminate loading • Needs additional buffer stage at input • Matched source follower buffers possible in diff-diff configuration

  4. Using Summing Amplifier If Gm1 = Gm2 = Gm, and Gm(R1 + R2) >> 1, then VO/(VREF – VS) ≈ (1 + R1/R2) • Fully differential amplifier with accurate closed-loop gain • Common-mode stabilization achieved through resistors R1 and R2 • Voltage-sense node VS and reference node VREF not loaded • High values of R1, R2 needed to make loop-gain large • Needs output buffer

  5. Simpler Topologies ? Differential pair with source degeneration • This circuit can be designed for a chosen degree of accuracy by appropriate selection of gm(RS) • Resistors RD set the output common mode voltage • Output needs to be buffered

  6. Gain Variations From simulations using corner models from AMI and using ±20% for DR/R, the minimum value of (gm)RS ≈ 2-3 for 10% variations in A, over process and temperature

  7. Bandwidth

  8. Possible Improvements VO_CM = Vdd - (IT – ID)RD • The above circuit has an improved ICMR • Cascoding can be used for higher bandwidth at the cost of low ICMR

  9. Comparative Evaluation Diff pair with source degeneration satisfactory for low gain-bandwidth, and less accurate but simple solution

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