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In-memory computing

Sylvain EUDIER Union College, 2004 MSCS Candidate. In-memory computing. A solution to the Von Neumann bottleneck. Plan. Introduction to a new architecture Different architectures The C-RAM Architecture: Implication / Application Performances Conclusion. Introduction.

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In-memory computing

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  1. Sylvain EUDIER Union College, 2004 MSCS Candidate In-memory computing A solution to the Von Neumann bottleneck

  2. Plan • Introduction to a new architecture • Different architectures • The C-RAM Architecture: • Implication / Application • Performances • Conclusion Seminar - Processing in Memory

  3. Introduction • Von Neumann architecture • The situation (gap evolution) • Some improvements were made • Can we avoid this bottleneck? (graph) Seminar - Processing in Memory

  4. Different Architectures • Architectures and designs • IRAM (design) • RAW (design) • CRAM (design) Seminar - Processing in Memory

  5. The C-RAM (Computational RAM) architecture • Applications • Performances • Implications • New software design • Energy consumption Seminar - Processing in Memory

  6. CRAM Applications • Image processing : Low-level adjustments (brightness, average filter…) • Databases searches : Equivalence, Extremes, between limits… • Multimedia Compression: MPEG Motion estimation Seminar - Processing in Memory

  7. Performances - Configs • CRAM 200Mhz; 32MB; 64K PE’s on a Pentium 133Mhz (simulated) • Pentium 133Mhz with 32 MB Ram • Sun SPARC Station 167 Mhz CPU with 64 MB Seminar - Processing in Memory

  8. Performances – Basic ops Ops complexity Seminar - Processing in Memory

  9. Performances - Comparison Seminar - Processing in Memory

  10. New Software Design (Step 1) • Think Parallel (pseudo code) Seminar - Processing in Memory

  11. New Software Design (Step 2) • Use a different language (modified C++) Seminar - Processing in Memory

  12. New Software Design (Step 3) • Possibly coding in assembly to optimize Seminar - Processing in Memory

  13. CRAM Energy Consumption • We avoid the use of a bus • We have a direct access to memory • No overhead in communication • Finally the CRAM use 20 times less energy therefore less heat Seminar - Processing in Memory

  14. The future… • Which architecture will be chosen? • End of today’s architecture? • A PetaOps is feasible with CRAM • Blue Gene/P aims at the petaFlops (view) Seminar - Processing in Memory

  15. Questions ? Seminar - Processing in Memory

  16. Memory bandwidth in a computer Back Seminar - Processing in Memory

  17. IRAM Design Back Seminar - Processing in Memory

  18. RAW Design Back Seminar - Processing in Memory

  19. CRAM Design Back Seminar - Processing in Memory

  20. Operations Complexity for CRAM Back Seminar - Processing in Memory

  21. Blue Gene/P Scale Seminar - Processing in Memory

  22. Computing power Scale Seminar - Processing in Memory Back

  23. Memory – processors gap evolution Seminar - Processing in Memory Back

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