1 / 22

Week 11 Lecture slides

Cosc 3P92. Week 11 Lecture slides. Violence is the last refuge of the incompetent. Isaac Asimov, Salvor Hardin in "Foundation". Input/ Output. There are two general types of I/O devices: 1. physica l I/O devices eg. output port to printer

claire
Download Presentation

Week 11 Lecture slides

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Cosc 3P92 Week 11 Lecture slides Violence is the last refuge of the incompetent. Isaac Asimov, Salvor Hardin in "Foundation"

  2. Input/ Output • There are two general types of I/O devices: 1. physical I/O devices eg. output port to printer 2. virtual (logical) I/O devices: operating system abstractions eg. spooled print file, files vs. sectors on disk • Telephony Application Programmed Interface (TAPI) • Telephony Service Provider Programming Interface (TSPI) Physical I/O • To transfer information between CPU and physical I/O devices, one may use the following techniques: 1. programmed I/O 2. interrupt (-driven) I/O 3. direct memory access (DMA)

  3. 1. Programmed I/O • I/O ports may be addressed using: 1. standard (isolated) I/O address space • eg. Intel • In and OUT instructions • pin on CPU chip indicates whether IO or memory address space being used. [See next slide] 2. memory-mapped I/O address space • eg. Motorola • devices reside at specific memory locations.

  4. 8088 i/oport control

  5. 1. Programmed I/O • Advantages Memory-mapped I/O: • no special I/O opcodes • all instns that reference memory can access IO • # I/O ports is unlimited • hardware bus simplified • Disadvantages: • I/O interfaces may need more circuitry to recognize larger addresses. • possible slow down in bus performance.

  6. Data-direction register 0 1 1 0 0 1 1 0 1=output 0=input I/O port • An I/O operation may be performed: 1. unconditionally – CPU sends data to device at any time 2. conditionally – checking the status of the device before the operation (i.e. handshaking). • CPU may have to poll and wait for device -> inefficient • The CPU communicates with an I/O devices via one or more registers called I/O ports. • Bit-serial ports • Every bit in the port may be configured as either input or output.

  7. Command register 0 1 1 0 0 1 1 0 1=output 0=input Other control signals B A I/O port A (output) I/O port B (input) • Parallel ports • Each I/O port (as a whole) may be configured as either input or output.

  8. Current execution path Interrupt-service routine Interrupted Interrupt occurs perform I/O transfer Resume Return from interrupt Interrupt I/O • When an I/O device is ready to send (receive) data to (from) the CPU, it signals (or interrupts) the CPU for its attention. • No need to poll device status. • As soon as the CPU finishes the current instruction, it transfers its execution to an interrupt-service routine which responds to the external interrupt. • Q. How does the CPU know which one of the ISRs to execute when there is more than one? • Interrupt Service Vectors: address of interrupt service routines, commonly kept in special jump table.

  9. Interrupt I/O example code: Setting up interrupt I/O... move.b #$81, DDRA ; data direction move.b #$00, DDRB ; registers move.b #$81, PORTA ; start pulse move.b #$01, PORTA ; to device ... Device will cause interrupt when ready/done, and an interrupt routine will complete transaction... move.b PORTB, D1 ; interrupt service rtn. rte

  10. Interrupt I/O (continued) • Polled • Daisy-chain

  11. Direct Memory Access (DMA) • It is a technique of transferring data between memory and I/O devices without CPU intervention. • CPU sets up transfer with DMA controller; then transaction occurs without CPU

  12. Direct Memory Access (DMA)

  13. DMA 3 techniques: 1. Block transfer - whole data block transferred - CPU can do non-related bus activities in the meanwhile 2. Cycle stealing - DMA controller freezes the CPU, and then does a DMA while CPU frozen - word-by-word transfer 3. Interleaved - DMA controller uses CPU cycles that aren't using the bus, letting DMA xfers and CPU alternate use of the bus

  14. I/O Processor (data channel) • Independent dedicated I/O processors (smart DMA controllers) are used in mainframe computer systems to communicate with I/O devices.

  15. I/O processors • Each IOP uses DMA to communicate with devices • Some considerations: • priority system for IOP's sharing system bus • priority system for devices on one IO bus • IOP requires software or hardware to manage different devices

  16. IO example: LED • Encoder, part of kbd. • Converts key press into ASCII encoded byte. • Bus Interface communicates data to I/O bus.

  17. 8086 Programmed IO

  18. 8086 Programmed IO

  19. 68000 IO

  20. 68000 IO

  21. 68000 memory

  22. The end

More Related