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20.2 The Instruction Cycle

20.2 The Instruction Cycle. Fetch an instruction from the main memory currently addressed by the PC and store the instruction in the IR. The PC is automatically increased by 1 so as to hold the address of the next instruction. Decode the instruction in the IR by the instruction decoder.

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20.2 The Instruction Cycle

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  1. 20.2 The Instruction Cycle • Fetch an instruction from the main memory currently addressed by the PC and store the instruction in the IR.

  2. The PC is automatically increased by 1 so as to hold the address of the next instruction. • Decode the instruction in the IR by the instruction decoder. • Execute the instruction.

  3. The instruction cycle is also called fetch-and-execute cycle.

  4. Increase PC by 1 Start Fetch an instructionfrom the main memory Decode the instruction Execute the instruction

  5. Let us now process the following instructions to make clear the concept of instruction cycle.

  6. ALU Control unit Memory unit Main memory MAR +1 PC Adder(s) IR ACC SR Instructiondecoder MDR Fetch cycle of instruction 1 0001 0001 Instruction 1 0010 Instruction 2 0011 Instruction 3 0100 Instruction 4  0010 0001 Addressdecoder Instruction 1 Instruction 1

  7. Control unit Memory unit ALU Main memory MAR +1 PC Adder(s) IR ACC SR Instructiondecoder MDR Execute cycle of instruction 1 1100 0001 Instruction 1 0010 Instruction 2 0011 Instruction 3 0100 Instruction 4  1100 4 1101 6 0010 Addressdecoder Instruction 1 4 4

  8. The fetch cycle for instruction 2 and instruction 3 are similar to that of instruction 1. • The execute cycle of instruction 2 and instruction 3 are illustrated below:

  9. ALU Control unit Memory unit Main memory MAR +1 PC Adder(s) IR ACC SR Instructiondecoder MDR Execute cycle of instruction 2 1101 0001 Instruction 1 0010 Instruction 2 0011 Instruction 3 0100 Instruction 4  1100 4 1101 6 0011 6 + 4 = 10 Addressdecoder Instruction 2 4 10 6

  10. ALU Control unit Memory unit Main memory MAR +1 PC Adder(s) 0001 instruction 1 0010 instruction 2 0011 instruction 3 0100 instruction 4  1100 4 1101 6 1110 IR ACC SR Instruction decoder MDR Execute cycle of instruction 3 1110 0001 instruction 1 0010 instruction 2 0011 instruction 3 0100 instruction 4  1100 4 1101 6 0001 instruction 1 0010 instruction 2 0011 instruction 3 0100 instruction 4  1100 4 1101 6 1110 10 0100 Addressdecoder Instruction 3 4 10 6 10

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