B. Mikulec , B. Puccio , J-L. Sanchez

1. Proposal for a Beam Interlock System for Linac4, Transfer and Measurement Lines as well asPSB with Linac4 B. Mikulec, B. Puccio, J-L. Sanchez

2. Outline • Constraints influencing interlock design • Proposed hybrid interlock principle • Hardware interlock system: BIS • BIS for Linac4 • BIS for PSB • Software interlock system: SIS • External conditions • Linac4 EC • PSB EC • Synchronisation of BIS action • Summary and open points Linac4 BCC - Interlocks

3. Beam Interlock System – Design Constraints (1) • Main constraints: • Multiple ‘interlock zones’ due to several destinations, distinction in ‘operational modes’ not practicable • Destinations for Linac4: L4DUMP, LBE, LBS, PSB • PSB destinations: BDUMP, ISOGPS, ISOHRS, PS •  Should consider PSB and Linac4 interlock systems in parallel! (PSB is a Linac4 destination; analysis of injection permit is required) • PSB is (timing) master of Linac4 • Maximise proton delivery to the experiments via ‘External Conditions’; the user (+beam destination) is calculated for the current cycle depending on some necessary conditions; this analysis yields the decision if the ‘normal’ or ‘spare’ cycle should be executed (or currently ‘tailclipper’ if both not possible); maintain this flexibility Linac4 BCC - Interlocks

4. Interlock Zones • Linac4 interlock zones • PSB interlock zones Linac4 BCC - Interlocks

5. Beam Interlock System – Design Constraints (2) • Source should continue pulsing with constant timings to provide stable beam current (requested also for Linac4 RF feed-forward loop) • Beam stopper movement too slow for cycle-to-cycle changes and bending magnet rise- and fall-times toolongfor fast reaction to pulsed equipment failures • Linac2 dump currently only used for (pre-programmed) ZERO cycles • To be maintained with Linac4 - ZERO cycles should have Linac4 dump destination (to be discussed if feasible that pre-chopper maintains its voltage and chopper does not pulse to increase chopper lifetime) Linac4 BCC - Interlocks

6. Beam Interlock System – Design Principle • Three main ingredients (hybrid system): • Hardware interlock system (BIS): reliable, fast • For fast reaction times (to avoid sending the beam pulse shortly before its creation or to dump part of the pulse if conditions change) • If considered useful to avoid machine activation • Software interlock system (SIS): flexible • For slow-changing parameters • If some more complex logic needs to be adopted • External conditions (EC): for proton optimisation • Consider user requests and zone/beam inhibits • Method also useful for ring-specific interlocks and beam intercepting devices requiring shorter Linac4 pulses Remark: A clear distinction between 1-3 is not always possible; open for discussion... Linac4 BCC - Interlocks

7. Hardware Interlock System (BIS) • Based on Beam Interlock Controller (BIC) modules already used in LHC and SPS and user interface boards (CIBU): see presentation B. Puccio • We propose to use a tree architecture for the Linac4 BIS • Slave BICs: AND operation of the max. 15 inputs (14+1) • Input 0: SIS, inputs 1-7 non maskable, inputs 8-14 maskable • Master BICs: AND and OR operations possible • Inputs: either outputs from Slave BICs or additional USER_PERMIT inputs Linac4 BCC - Interlocks

8. Linac4/PSB BIS Layout • 3 Master BICs: ‘Source RF’, ‘Choppers’, ‘PSB Ejection’ • Names describe action of the Master BIC Optional BIC Remark: No separate BIC, output from Slave BIC ‘PSB OK (2)’ Linac4 BCC - Interlocks

9. Reminder: Source Timing • Approximate timing diagram • Interlock action possible on source RF and pre-chopper timings Linac4 BCC - Interlocks

10. Linac4 BIS (1) • Master BIC ‘Source RF’ (no slave BIC connected) • Action: switch off the source RF voltage (~10 μs reaction time) • Redundant action: pulse pre-chopper (use timing signals NX.STOP(START)-PCHOP); ~2 μs rise-time to assure correct chopper action (for Master BIC ‘Choppers’ – see next slides) Linac4 BCC - Interlocks

11. Linac4 BIS (3) • Master BIC ‘Choppers’ • Action: pulse pre-chopper (use timing signals NX.STOP(START)-PCHOP); ~2 μs rise-time • Redundant action: pulse chopper; a few ns rise-time • Disable start timing of PSB RF • Evaluate destinations optional input for PS injection permit Linac4 BCC - Interlocks

12. Linac4 BIS (4) • Slave BIC ‘Linac4 and Linac4 Transfer Lines OK’ • Input for Master BIC ‘Choppers’ • L4 Magnet Current Status: AQN of main bendings surveyed with FGCs depending on destination (OR of digital output signals if AQN outside window ~1 ms before beam pulse) • Precision to be defined! (need for example 0.5% precision for LT.BHZ20 to avoid >10% losses in the distributor) • EC only if all rings affected (e.g. user requests; see later) only up to L4T.MBH.0210 Remark: inputs marked in grey have evaluation of destination in their front-end application! Linac4 BCC - Interlocks

13. Linac4 BIS (PSB Injection Permit) (1) • Slave BIC ‘PSB OK (1)’ • Input for Slave BIC ‘PSB OK (2)’ • Check pulsing equipment ~1 ms – 250 μs before beam production; checks during injection can also be envisaged (distributor, septum?) Linac4 BCC - Interlocks

14. Linac4 BIS (PSB Injection Permit) (2) • Slave BIC ‘PSB OK (2)’ • Input for Master BIC ‘Choppers’ • Channels 1 and 2 could be combined; BLMs always active • For the extraction elements simply provision of error status Linac4 BCC - Interlocks

15. For Completeness: PSB BIS • Master BIC ‘PSB Ejection’ • Action: disable PSB extraction kickers • Remark: rise-time of magnets too slow to take different action Linac4 BCC - Interlocks

16. Linac4 SIS • Reaction time of SIS usually >1 cycle • SIS can evaluate different conditions, e.g. destination • Action depending on Master BIC affiliation • List not exhaustive! • WIC (Warm magnet Interlock Controllers; PLC-based) information to be transmitted to SIS Linac4 BCC - Interlocks

17. PSB Injection SIS • Output connected to Slave BIC ‘PSB OK’ • Action defined by Master BIC ‘Choppers’ (pre-chopper, chopper and PSB RF) • List not exhaustive! • WIC information to be transmitted to SIS Linac4 BCC - Interlocks

18. Linac4 EC • Linac4 EC not to be confused with PSB EC for proton optimisation; here the aim is to reduce the Linac4 pulse length • Proposed action: advance NX.START-PCHOP to remove last 3/4th of the pulse and pulse at the same time the chopper • BI provides EC signal when equipment is MOVING and IN • Add equipment that cannot stand full pulse (wire scanners etc.?) Linac4 BCC - Interlocks

19. PSB EC • Action of ring-specific EC: pulse chopper to remove beam fraction for corresponding ring(s) and switch off PSB RF for that ring • Action for destination-specific EC: try to execute ‘spare’ user; if not possible, EC signal is sent to input of slave BIC ‘Linac4 and Linac4 transfer OK’ leading to a combined pre-chopper/chopper/PSB RF inhibit Linac4 BCC - Interlocks

20. Synchronisation Needs of BIS for Linac4 • For H- source action (switch off source RF): • Received beam permit only to be considered within window starting ~1 ms before beam pulse until its end • For pre-chopper action: • If beam permit FALSE before NX.STOP-PCHOP continue pulsing • If beam permit changes to FALSE after this timing: issue timing NX.START-PCHOP • For chopper action: • Act corresponding to beam permit, but only during the 400 μs window of the beam passage Linac4 BCC - Interlocks

21. Synchronisation Needs of BIS for PSB • For PSB RF: • Check beam permit just before injection into the PSB (~200 μs before) and don’t issue the timing for the start of the PSB RF (for all or only individual rings) • For PSB extraction kickers: • Check beam permit at a defined moment just before charging of the extraction kickers (~10 ms before extraction) Linac4 BCC - Interlocks

22. Conclusions • Hybrid beam interlock concept based on BIS, SIS and EC. • Timings, synchronisation and tolerances need to be defined in detail • EDMS document L4-CIB-ES-0001 (1016233 v.0.2) will be submitted including remarks after today’s meeting Important remark: The beam interlock system does not include personnel safety systems! Linac4 BCC - Interlocks