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De-synchronization: from synchronous to asynchronous

De-synchronization: from synchronous to asynchronous. Based on the paper: Blunno , Cortadella, Kondratyev , Lavagno , Lwin , Sotiriou , Handshake protocols for de-synchronization, ASYNC 2004. Outline. What is de-synchronization ? Behavioral equivalence

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De-synchronization: from synchronous to asynchronous

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  1. De-synchronization:from synchronous to asynchronous Based on the paper: Blunno, Cortadella, Kondratyev, Lavagno, Lwin, Sotiriou, Handshake protocols for de-synchronization, ASYNC 2004.

  2. Outline • What is de-synchronization ? • Behavioral equivalence • 4-phase protocols for de-synchronization • Concurrency • Correctness • An example

  3. De-synchronize Asynchronous CLK Synchronous CLK

  4. MS flip-flop Synchronous circuit L L L L 0 1 0 1 CLK 0 0 L L

  5. C C C C C C De-synchronization L L L L 0 1 0 1 0 0 L L

  6. De-synchronization Distributed controllers substitute the clock network C C C C C C The data path remains intact !

  7. Design flow • Think synchronous • Design synchronous:one clock and edge-triggered flip-flops • De-synchronize (automatically) • Run it asynchronously

  8. Prior work • Micropipelines (Sutherland, 1989) • Local generation of clocks • Varshavsky et al., 1995 • Kol and Ginosar, 1996 • Theseus Logic (Ligthart et al., 2000) • Commercial HDL synthesis tools • Direct translation and special registers • Phased logic (Linder and Harden, 1996) (Reese, Thornton, Traver, 2003) • Conceptually similar • Different handshake protocol (2 phase vs. 4 phase)

  9. Automatic de-synchronization • Devise an automaticmethod forde-synchronization • Identify a subclass of synchronous circuits suitable for de-synchronization • Formally prove correctness

  10. Outline • What is de-synchronization ? • Behavioral equivalence • 4-phase protocols for de-synchronization • Concurrency • Correctness • An example

  11. Synchronous flow

  12. De-synchronized flow

  13. +

  14. Flow equivalence [Guernic, Talpin, Lann, 2003]

  15. A B

  16. Flow equivalence CLK A 1 3 0 2 1 5 3 1 6 0 B 5 1 2 3 1 4 2 4 3 1 Synchronous behavior A 1 3 0 2 1 5 3 1 6 0 B 5 1 2 3 1 4 2 4 3 1 De-synchronized behavior

  17. Flow equivalence CLK A 1 3 0 2 1 5 3 1 6 0 B 5 1 2 3 1 4 2 4 3 1 Synchronous behavior A 1 3 0 2 1 5 3 1 6 0 B 5 1 2 3 1 4 2 4 3 1 De-synchronized behavior

  18. Outline • What is de-synchronization ? • Behavioral equivalence • 4-phase protocols for de-synchronization • Concurrency • Correctness • An example

  19. C C C C C C L L L L 0 1 0 1 0 0 L L

  20. C C C C C C

  21. L C

  22. A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A latch cannot read another data item untilthe successor has captured the current one A B C D 0 0 0 0

  23. A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A latch cannot read another data item untilthe successor has captured the current one A B C D 0 1 0 0

  24. A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A latch cannot read another data item untilthe successor has captured the current one A B C D 0 0 0 0

  25. A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A B C D 1 0 0 0 A latch cannot read another data item untilthe successor has captured the current one

  26. A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A B C D 0 0 0 0

  27. A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A- B+ C- D+ A+ B- C+ D- A B C D 0 0 0 1

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