Lab 8 – Sequential Circuits

Lab 8 – Sequential Circuits The George Washington UniversitySchool of Engineering and Applied ScienceDepartment of Electrical and Computer Engineering Jason Woytowich November 11, 2005

Schedule • November 11 – Sequential Circuits • November 18 – Review Final Project • November 25 – Thanksgiving, no class • December 2 – Final Project Due

Lab Activity • Build a 4-bit parallel input shift register. • There are two control inputs ‘Load’ and ‘Shift’ • One clock • 4 Parallel inputs and 1 serial output

Design X0 X1 X2 X3 Out Load Shift The clock is not shown

Shift Cell

Shift Register

Testbench

Test Inputs

Test Outputs

State Machines • Completely describe the needed function. • Choose how to implement it. Mealy vs. Moore. • Draw state transition diagrams and assign a representation to the states. • From your diagram create a table of inputs, states, next states, and outputs. • From the table determine the combinational logic needed.

Homework • Build and test a 4-bit counter with synchronous reset and enable count inputs.

Lab 8 – Sequential Circuits