260 likes | 491 Views
ECE 331 – Digital System Design. Multilevel Logic Circuits and Logic Circuit Analysis (Lecture #8). Multilevel Logic Circuits. Multilevel Logic Circuits. Thus far we have focused on the realization of optimal logic circuits through the derivation of Minimum Sum-of-Products expressions
E N D
ECE 331 – Digital System Design Multilevel Logic Circuits and Logic Circuit Analysis (Lecture #8)
ECE 331 - Digital System Design Multilevel Logic Circuits
ECE 331 - Digital System Design Multilevel Logic Circuits Thus far we have focused on the realization of optimal logic circuits through the derivation of Minimum Sum-of-Products expressions Minimum Product-of-Sums expressions Both forms of Boolean expressions are realized as two-level logic circuits AND-OR [NAND-NAND] circuit ↔ SOP OR-AND [NOR-NOR] circuit ↔ POS There are a maximum of two logic gates between every input and the output(s).
ECE 331 - Digital System Design Multilevel Logic Circuits A two-level logic circuit is usually efficient for Boolean expressions of a few variables. However, as the number of inputs increases, a two-level logic circuit may result in fan-in problems. Fan-in refers to the number of inputs to a logic gate Whether fan-in is an issue is dependent upon the technology used to implement the logic circuit. Standard TTL and CMOS chips Field Programmable Gate Array (FPGA) Complex Programmable Logic Device (CPLD)
ECE 331 - Digital System Design Multilevel Logic Circuits Example: Realize the following Boolean expression using only 2-input AND gates and 2-input OR gates. F(A,B,C) = S m(0, 5, 6)
ECE 331 - Digital System Design Multilevel Logic Circuits Often requires fewer logic gates than the logically equivalent two-level logic circuit. Reduced (silicon) area Decreased cost Requires less complex wiring between logic gates Fewer literals results in fewer interconnecting wires Has a greater propagation delay than the logically equivalent two-level logic circuit. Each additional level adds to the propagation delay Decreased speed
ECE 331 - Digital System Design Multilevel Logic Circuits Objectives: 1. Design logic circuits that meet the fan-in requirements of the chosen technology. 2. Design a minimum-cost logic circuit.
ECE 331 - Digital System Design Multilevel Logic Circuits Two techniques that can be used to realize multilevel logic circuits: 1. Factoring 2. Functional Decomposition
ECE 331 - Digital System Design Factoring Example: Realize a logic circuit that has a maximum fan-in of two for the following Boolean expression. F(A..G) = ACF' + ADEF' + BCG + BDEG
ECE 331 - Digital System Design Factoring Example: Design the minimum-cost logic circuit that implements the following Boolean expressions. F1(A,B,C,D) = S m(1,2,3,7,11,15) F2(A,B,C,D) = P M(0,1,2,3,4,8,12)
ECE 331 - Digital System Design Functional Decomposition Example: Design a minimum-cost logic circuit to implement the following Boolean expression. F(A,B,C,D) = A'BC + AB'C + ABD + A'B'D
ECE 331 - Digital System Design NAND and NOR Circuits As with two-level circuits, multilevel circuits can be realized using NAND or NOR gates only.
ECE 331 - Digital System Design NAND and NOR Circuits Example: Realizing a NAND Circuit
ECE 331 - Digital System Design NAND and NOR Circuits x 1 x 2 x 3 f x 4 x 5 x 6 x 7
ECE 331 - Digital System Design NAND and NOR Circuits x 1 x 2 x 3 x f 4 x 5 x 6 x 7
ECE 331 - Digital System Design NAND and NOR Circuits x 1 x 2 x 3 x f 4 x 5 x 6 x 7
ECE 331 - Digital System Design NAND and NOR Circuits Example: Realizing a NOR Circuit
ECE 331 - Digital System Design NAND and NOR Circuits x 1 x 2 x 3 f x 4 x 5 x 6 x 7
ECE 331 - Digital System Design NAND and NOR Circuits x 1 x 2 x 3 f x 4 x 5 x 6 x 7
ECE 331 - Digital System Design NAND and NOR Circuits x 1 x 2 x 3 f x 4 x 5 x 6 x 7
ECE 331 - Digital System Design Logic Circuit Analysis
ECE 331 - Digital System Design Logic Circuit Analysis Analysis: Determining the behavior of a system given its description. The description of the system is often provided in the form of a circuit diagram.
ECE 331 - Digital System Design Logic Circuit Analysis For two-level circuits, the analysis process is simple. The Boolean expression representing the circuit can often be written by inspection. For multilevel circuits, the analysis process is much more complicated. Cannot write a Boolean expression by inspection. Must follow a procedure to implement the analysis.
ECE 331 - Digital System Design Logic Circuit Analysis Identify inputs and outputs Track circuit behavior from input to output Determine Boolean expression for output(s) Determine Truth Table Examine circuit timing, power dissipation, etc.
ECE 331 - Digital System Design Logic Circuit Analysis x 1 P 1 x P 2 9 x 5 x P f 3 4 P 7 P 2 P P 10 P P 3 6 8 x 4 P 5