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Topics. Combinational logic functions. Static complementary logic gate structures. Combinational logic expressions. Combinational logic: function value is a combination of function arguments. A logic gate implements a particular logic function.

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  1. Topics • Combinational logic functions. • Static complementary logic gate structures.

  2. Combinational logic expressions • Combinational logic: function value is a combination of function arguments. • A logic gate implements a particular logic function. • Both specification (logic equations) and implementation (logic gate networks) are written in Boolean logic.

  3. Gate design Why designing gates for logic functions is non-trivial: • may not have logic gates in the libray for all logic expressions; • a logic expression may map into gates that consume a lot of area, delay, or power.

  4. Boolean algebra terminology • Function: f = a’b + ab’ • a is a variable; a and a’ are literals. • ab’ is a term. • A function is irredundant if no literal can be removed without changing its truth value.

  5. Completeness • A set of functions f1, f2, ... is complete iff every Boolean function can be generated by a combination of the functions. • NAND is a complete set; NOR is a complete set; {AND, OR} is not complete. • Transmission gates are not complete. • If your set of logic gates is not complete, you can’t design arbitrary logic.

  6. Static complementary gates • Complementary: have complementary pullup (p-type) and pulldown (n-type) networks. • Static: do not rely on stored charge. • Simple, effective, reliable; hence ubiquitous.

  7. Static complementary gate structure Pullup and pulldown networks: VDD pullup network out inputs pulldown network VSS

  8. Inverter + out a

  9. VDD tub ties transistors GND Inverter layout + (tubs not shown) out a a out

  10. NAND gate + out b a

  11. VDD tub ties GND NAND layout + out out b a b a

  12. NOR gate + b a out

  13. VDD tub ties GND NOR layout b a b out out a

  14. AOI/OAI gates • AOI = and/or/invert; OAI = or/and/invert. • Implement larger functions. • Pullup and pulldown networks are compact: smaller area, higher speed than NAND/NOR network equivalents. • AOI312: and 3 inputs, and 1 input (dummy), and 2 inputs; or together these terms; then invert.

  15. AOI example out = [ab+c]’: invert symbol circuit or and

  16. Pullup/pulldown network design • Pullup and pulldown networks are duals. • To design one gate, first design one network, then compute dual to get other network. • Example: design network which pulls down when output should be 0, then find dual to get pullup network.

  17. a a dummy c b b c dummy Dual network construction

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