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Operating Systems CS3013 / CS502

Operating Systems CS3013 / CS502. WEEK 5 VIRTUAL MEMORY INPUT AND OUTPUT. Agenda. Virtual Memory Input and Output. Objectives. Identify virtual memory, page faults and overhead Differentiate various page replacement policies

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Operating Systems CS3013 / CS502

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  1. Operating SystemsCS3013 / CS502 WEEK 5 VIRTUAL MEMORY INPUT AND OUTPUT

  2. Agenda • Virtual Memory • Input and Output

  3. Objectives • Identify virtual memory, page faults and overhead • Differentiate various page replacement policies • Explain advantages and/or disadvantages of different page replacement policies • Explain thrashing

  4. Review • Virtual/Logical Address • The address space in which a process “thinks” • Distinguished from Physical Memory, the address space fo the hardware memory system • Multiple forms • Base and Limit registers • Paging • Segmentation • Memory Management Unit (MMU) • Present in most modern processors • Converts all virtual addresses to physical address • Transparent to execution of programs

  5. Review • Translation Lookaside Buffer (TLB) • Hardware associative memory for very fast page table lookup of small set of active pages • Can be managed in OS or in hardware (or both) • Must be flushed on context switch • Page table organization • Direct: maps virtual address  physical address • Hashed • Inverted: maps physical address  virtual address

  6. Motivation • Logical address space larger than physical memory • 232 about 4GB in size • “Virtual Memory” • On disk • Abstraction for programmer • Examples: • Unused libraries • Error handling not used • Maximum arrays

  7. Paging Implementation Page 0 1 v 0 0 Page 1 0 i Page 0 0 2 1 1 3 Page 2 3 v 2 2 1 Page 3 0 i Page 2 3 3 Logical Memory Page Table Physical Memory Virtual Memory What happens when access invalid page?

  8. Cache? • Translation Lookaside Buffer (TLB) and Page Table • Physical Memory and Virtual Memory • Issues • When to put something in the cache • What to throw out to create cache space for new items • How to keep cached item and stored item in sync after one or the other is updated • Size of cache needed to be effective • Size of cache items for efficiency

  9. Virtual Memory • When to swap in a page • On demand? Or in anticipation? • What to throw out • Page Replacement Policy • Keeping dirty pages in sync with disk • Flushing strategy • Size of pages for efficiency • One size fits all, or multiple sizes?

  10. No Free Frames • Page fault  What if no free frames? • Terminate process (out of memory) • Swap out process (reduces degree of multiprogramming) • Replace another page with needed page • Page replacement

  11. VM Page Replacement • If there is an unused frame, use it • If there are no unused frames available, select a victim (according to policy) and • If it contains a dirty page • Write it to the disk • Invalidate its PTE and TLB entry • Load in new page from disk (or create new page) • Update the PTE and TLB entry • Restart the faulting instruction • What is cost of replace a page? • How does the OS select the page to be evicted?

  12. Page Replacement Page 0 1 v 0 Page 1 0 v i 1 Page B0 0 Page 2 3 v B1 A0 A2 2 Page A0 1 A3 Page 3 0 i 3 Page B1 Page A1 2 A1 Logical Memory Page Table Page A2 3 0 v 0 Virtual Memory Physical Memory 2 i v 1 Page Table

  13. Demanding Page Performance • Page Fault Rate (p) • 0 ≤ p < 1 (no page faults to every reference) • Page Fault Overhead • = read page time + fault service time + restart process time • read page time ~ 8-20 msec • restart process time ~ 0.1-10-100 μsec • fault service time ~ 0.1-10 μsec • Dominated by time to read page in from disk

  14. Demand Paging Performance • Effective Access Time (EAT) • = (1 – p) * memory access time + p * page fault overhead • Want EAT to degrade no more than, say, 10% from true memory access time • i.e. EAT < (1 + 10%) * memory access time

  15. Performance Example • Memory access time = 100 ns • Page fault overhead = 25 ms • Page fault rate = 1/1000 • What is the Effective Access Time?

  16. Performance Example • Memory access time = 100 ns • Page fault overhead = 25 ms • Goal: achieve less than 10% degradation

  17. Page Replacement Algorithms • Want lowest page-fault rate • Evaluate algorithm by running it on a particular string of memory references (reference string) and computing the number of page faults on that string • Reference string – ordered list of pages accessed as process executes Ex. Reference String : 1 2 3 1 2 4 1 4 2 3 2

  18. First-In-First-Out (FIFO) • Easy to implement • When swapping a page in, place its page id on end of list • Evict page at head of list • Page to be evicted has been in memory the longest time, but … • Maybe it is being used, very active even • Weird phenomenon: Belady’s Anomaly • Page fault rate may increase when there is more physical memory! • FIFO is rarely used in practice

  19. FIFO Illustrating Belady’s Anomaly

  20. First-In-First-Out (FIFO) Reference String : 1,2,3,4,1,2,5,1,2,3,4,5 3 Frames/Process

  21. First-In-First-Out (FIFO) • How can we reduce the number of page faults? Reference String : 1,2,3,4,1,2,5,1,2,3,4,5 1 4 5 2 3 Frames/Process 1 3 9 page faults! 3 2 4

  22. The Best Page to Replace • The best page to replace is the one that will never be accessed again. • Optimal Algorithm – Belady’s Rule • Lowest fault rate for any reference string • Basically, replace the page that will not be used for the longest time in the future • Belady’s Rule is a yardstick • We want to find close approximations

  23. Optimal Reference String : 1,2,3,4,1,2,5,1,2,3,4,5 4 Frames/Process 3

  24. Optimal • Minimum # of page faults. Use this as benchmark Reference String : 1,2,3,4,1,2,5,1,2,3,4,5 1 4 2 4 Frames/Process 6 page faults! 3 3 4 5

  25. Least Recently Used (LRU) • Counter implementation • Every page has a counter; every time page is referenced, copy clock to counter • When a page needs to be changed, compare the counters to determine which to change • Stack implementation • Keep a stack of page numbers • Page referenced: move to top • No search needed for replacement

  26. LRU Approximation Reference String : 1,2,3,4,1,2,5,1,2,3,4,5 4 Frames/Process 3

  27. Least Recently Used Reference String : 1,2,3,4,1,2,5,1,2,3,4,5 1 5 2 4 Frames/Process 8 page faults! 3 3 5 4 4 3

  28. LRU Approximation • LRU is good but hardware support expensive • Aging • Keep a counter for each PTE • Periodically (clock interrupt) – check R-bit • If R = 0, increment counter (page has not been used) • If R = 1, clear the counter (page has been used) • Clear R = 0 • Counter contains # of intervals since last access • Replace page having largest counter value

  29. Second-Chance • Maintain FIFO page list • When a page frame is needed, check reference bit of top page in list • If R = 1, then move page to end of list and clear R, repeat • If R = 0, then evict the page • If page referenced enough, never replaced • Implement with a circular queue

  30. Second-Chance • If all 1, degenerates to FIFO (a) (b) 1 1 1 0 2 2 0 0 3 3 3 3 Next Victim 1 0 4 4 1 0

  31. Not Recently Used (NRU) • Enhanced Second-Chance • Uses 2 bits, reference bit and modify bit • Periodically clear R bit from all PTE’s • When needed, rank order pages as follows (R, M) • (0,0) neither recently used nor modified • (0,1) not recently used but modified • (1,0) recently used but “clean” • (1,1) recently used and modified • Evict a page at random from lowest non-empty class

  32. Thrashing • With multiprogramming, physical memory is shared • Kernel code • System buffers and system information (e.g. PTs) • Some for each process • Each process needs a minimum number of pages in memory to avoid thrashing • If a process does not have “enough” pages, the page-fault rate is very high • Low CPU utilization • OS thinks it needs increased multiprogramming • Adds another process to system

  33. Thrashing CPU utilization Degree of multiprogramming

  34. Working-Set Model • w = working-set window = fixed # of page references • total number of pages references in time T • Total = sum of size of w’s • m = number of frames

  35. Working Set Example • Assume T = 5 • 1 2 3 2 3 1 2 4 3 4 7 4 3 3 4 1 1 2 2 2 1 w={1,2,3} w={3,4,7} w={1,2} • If T too small, will not encompass locality • If T too large, will encompass several localities • If T  infinity, will encompass entire program • If Total > m  thrashing • Need to free up some physical memory • E.g. , suspend a process, swap all of its pages out

  36. increase number of frames upper bound Page Fault Rate lower bound decrease number of frames Number of Frames Page Fault Frequency • Establish “acceptable” page-fault rate • If rate too low, process loses frame • If rate too high, process gains frame

  37. Review of Page Replacement Algorithms

  38. Page Size • Old - Page size fixed, New -choose page size • How do we pick the right page size? Tradeoffs: • Fragmentation • Table size • Minimize I/O • transfer small (.1ms), latency + seek time large (10ms) • Locality • small finer resolution, but more faults • ex: 200K process (1/2 used), 1 fault / 200k, 100K faults/1 byte • Historical trend towards larger page sizes • CPU, memory faster proportionally than disks

  39. Program Structure • consider: int A[1024][1024]; for (j=0; j<1024; j++) for (i=0; i<1024; i++) A[i][j] = 0; • suppose: • process has 1 frame • 1 row per page •  1024 * 1024 page faults!

  40. Program Structure • consider: int A[1024][1024]; for (i=0; j<1024; j++) for (j=0; i<1024; i++) A[i][j] = 0; • 1024 page faults

  41. Process Priorities • Consider • Low priority process faults • Bring page in • Low priority process in ready queue for a while, waiting while high priority process runs • High priority process faults • Low priority page clean, not used in a while • Perfect!

  42. Real-Time Processes • Real-time • Bounds on delay • Hard real-time: systems crash  lives lost • Air-traffic control, factory automation • Soft real-time: application performance degradation • Audio, video • Paging adds unexpected delays • Avoid it • Lock bits for real-time processes

  43. Agenda • Virtual Memory • Input and Output

  44. Objectives • Explain different types of I/O devices • Explain how to handle various types of I/O interrupts • Give examples of types of I/O devices • Explain scheduling algorithms for hard disk head

  45. Introduction to Input/Output • One OS function is to control devices • Significant fraction of code (80-90% of Linux) • Want all devices to be simple to use • Convenient • Ex: stdin/stdout, pipe, re-direct • Want to optimize access to device • Efficient • Devices have very different needs

  46. Memory Device Device Hardware Organization (Simple) memory bus CPU

  47. Ether-net SCSI USB Modem Soundcard Printer Mouse Key-board Hardware Organization (typical Pentium) Main Memory AGP Port Level 2 cache CPU Bridge Graphics card Monitor ISA bridge PCI bus IDE disk ISA bus

  48. Kinds of I/O Device • Character (and sub-character devices) • Mouse, character terminal, joystick, keyboards • Block transfer • Disk, tape, CD, DVD • Network • Clocks • Internal, external • Graphics • GUI, games • Multimedia • Audio, video • Other • Sensors, controllers

  49. Controlling an I/O Device • A function of host CPU architecture • Special I/O Instructions • Opcode to stop, start, query, etc. • Separate I/O address space • Kernel mode only • Memory-mapped I/O control registers • Each register has a physical memory address • Writing to data register is output • Reading from data register is input • Writing to control register causes action • Can be mapped to kernel or user-level virtual memory

  50. I/O Device Types - Character • Access is serial. • Data register: • Register or address where data is read from or written to • Very limited capacity (at most a few bytes) • Action register: • When writing to register, causes a physical action • Reading from register yields zero • Status register: • Reading from register provides information • Writing to register is no-op

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