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Software Transactional Memory and Conditional Critical Regions. Word-Based Systems. Introduction: Motivation. Language Support for Lightweight Transactions (Harris & Fraser) Implement a declarative style of concurrency control where programmers indicate desired safety properties
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Software Transactional Memory and Conditional Critical Regions Word-Based Systems
Introduction: Motivation Language Support for Lightweight Transactions (Harris & Fraser) Implement a declarative style of concurrency control where programmers indicate desired safety properties New syntax implements Hoare’s Conditional Critical Region Implemented using their STM CS 5204 – Fall, 2009
CCR – Conditional Critical Region atomic (condition) { statements; } public int get() { atomic (items != 0) { items --; return buffer[items]; } } Means • Wait until Condition is satisfied • Execute statements atomically Pattern Example Use CS 5204 – Fall, 2009
CCR Implementation boolean done = false; while (!done) { STMStart (); try { if (condition) { statements; done = STMCommit (); } else { STMWait(); } } catch (Throwable t) { done = STMCommit (); if (done) { throw t; } } } Built on top of Software Transactional Memory Uses all traditional STM commands and STMWait CS 5204 – Fall, 2009
STM Heap Structure Ownership Records Application Heap . . Version 1 A1: 7 A2: 100 Version 1 A3: 200 . . . . . . Version 1 A4: 500 Version 1 A5: 600 . . . . CS 5204 – Fall, 2009
STM - Simple Transaction boolean done = false; while (true) { STMStart(); readvalues; if(STMValidate()){ statements; done = STMCommit(); if(done) { break; } } } CS 5204 – Fall, 2009
Transaction Management STMStart() STMAbort() STMCommit() STMValidate() STMWait() CS 5204 – Fall, 2009
STM - Simple Transaction Ownership Records Application Heap Transaction Descriptor 1 Committed Transaction Descriptor 1 Active . . Version 15 1 A1: 7 A1: (7,15) -> (7,15) A2: 100 A2: 300 A2: (100,7) -> (300,8) Version 8 Version 7 1 A3: 200 . . . . . . Version x A4: 500 Version y A5: 600 . . . . CS 5204 – Fall, 2009
STM Collisions - Abort Committing Ownership Records Application Heap Transaction Descriptor 1 Active . . 1 A1: 7 A1: (7,15) -> (7,15) A2: 100 A2: (100,7) -> (300,8) 2 1 A3: 200 . . . A2’s Ownership Record is unavailable! Commit Fails -abort . . . Transaction Descriptor 2 Active Transaction Descriptor 2 Aborted Version x A4: 500 Version y A5: 600 A2: (100, 7) -> (9,8) . . . . CS 5204 – Fall, 2009
STM Collisions - Sleep boolean done = false; while (!done) { STMStart (); try { if (condition) { statements; done = STMCommit (); } else { STMWait(); } } catch (Throwable t) { done = STMCommit (); if (done) { throw t; } } } Abort and wait atomic (condition) { statements; } But when do I wake up? CS 5204 – Fall, 2009
STM Sleep Committing Ownership Records Application Heap Transaction Descriptor 1 Active Transaction Descriptor 1 Committed . . Wake-up A1: 7 A1: (7,15) -> (7,15) A2: 100 A2: (100,7) -> (300,8) A3: 200 . . . I failed my CCR condition, so I aborted and fell asleep . . . Transaction Descriptor 2 Asleep Version x A4: 500 Version y A5: 600 A1: (7,15) -> (7,15) . . . . CS 5204 – Fall, 2009
STM Stealing - Optimization Ownership Records Application Heap Transaction Descriptor 1 Committed . . 1 A1: 7 A1: (7,15) -> (7,15) A2: 100 A2: (100,7) -> (300,8) 1 2 A3: 200 . . . . . . Transaction Descriptor 2 Active Version x A4: 500 A3: (200, 8) -> (8,9) Version y A5: 600 A2: (300,8) -> (300,9) . . . . CS 5204 – Fall, 2009
STM – HTM Parallels: Data Copies Old Data HTM: XCOMMIT STM: Xaction Descriptor Entry New Data HTM: XABORT STM: Xaction Descriptor Entry Commit Copy Original Memory CS 5204 – Fall, 2009
STM – HTM Parallels: 3 Tier Implementation HTM STM CS 5204 – Fall, 2009
Questions ???????? CS 5204 – Fall, 2009