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ECE 232 Hardware Organization and Design Lecture 6 MIPS Assembly Instructions, cont’d

ECE 232 Hardware Organization and Design Lecture 6 MIPS Assembly Instructions, cont’d. Maciej Ciesielski www.ecs.umass.edu/ece/labs/vlsicad/ece232/sp$r2002/index_232.html. Administrative issues. Homework #2 assigned today, due Th., Feb. 21 in class. Excuses that cannot be tolerated

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ECE 232 Hardware Organization and Design Lecture 6 MIPS Assembly Instructions, cont’d

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  1. ECE 232Hardware Organization and DesignLecture 6MIPS Assembly Instructions, cont’d Maciej Ciesielski www.ecs.umass.edu/ece/labs/vlsicad/ece232/sp$r2002/index_232.html

  2. Administrative issues • Homework #2 assigned today, due Th., Feb. 21 in class. • Excuses that cannot be tolerated • Forgot to buy the textbook • Forgot to do the homework • Dog ate the homework, etc … (you are pretty creative at those) • Solving the textbook problem • Putting one copy of text on reserve in Physical Science Library • Change in late homework policy • 25% per day – to allow to post solutions in 3-4 days • Midterm exam I – Th., March 7, 6:30 pm • Morrill Science Center (Bldg II) room 131 • No excuses (forgot, overslept, overate, etc) • Only legitimate reasons (in writing) can be accepted

  3. Outline • Review: MIPS instructions, formats • MIPS instructions: data transfers, arithmetic, logical • Pseudo-instruction example: loading large constant • MIPS register organization • Implementing loops • Implementing switch/case statement • Procedures and subroutines • Stacks and pointers • Running a program • Compiler, Assembler, Linker, Loader

  4. ... • Register (direct) op rs rt rd fnc register • Immediate op rs rt immed • Base+index op rs rt immed Memory + + register op rs rt immed Memory • PC-relative PC MIPS Addressing Modes/Instruction Formats All instructions are 32-bit wide

  5. MIPS: Software conventions for registers R0 $zero constant 0 R1 $at reserved for assembler R2 $v0 value registers & R3 $v1 function results R4 $a0arguments R5 $a1 R6 $a2 R7 $a3 R8 $t0temporary: caller saves . . . (callee can clobber) R15 $t7 R16 $s0callee saves . . . (caller can clobber) R23 $s7 R24 $t8temporary (cont’d) R25 $t9 R26 $k0 reserved for OS kernel R27 $k1 R28 $gp pointer to global area R29 $sp Stack pointer R30 $fp Frame pointer R31 $ra return Address

  6. LUI $r5 0000 … 0000 $r5 MIPS data transfer instructions Instruction Comment sw 500($r4), $r3 Store word sh 502($r2), $r3 Store half sb 41($r3), $r2 Store byte lw $r1, 30($r2) Load word lh $r1, 40($r3) Load halfword lhu $r1, 40($r3) Load halfword unsigned lb $r1, 40($r3) Load byte lbu $r1, 40($r3) Load byte unsigned lui $r1, 40 Load Upper Immediate (16 bits shifted left by 16)

  7. 0000 0000 0000 0000 upper 0 31 16 15 0000 0000 0000 0000 lower lower upper Loading large numbers • Pseudo-instruction li $t0, big: load 32-bit constant • lui $t0, upper # $t0[31:16] upper • ori $t0, $t0, lower # $t0  ($t0 Or [0ext.lower]) Or $to: 32-bit constant

  8. Loop with variable array index • Compile the following loop, with A[ ] = array with base address in $s5; variables g, h, i, j associated with registers $s1, $s2, $s3, $s4. • Loop: g = g + A[i]; • i = i + j; • if (i  h) go to Loop; • MIPS instructions: • Loop: add $t1, $s3, $s3 # $t1  i+i = 2i • add $t1, $t1, $t1 # $t1  2i+2i = 4i • add $t1, $t1, $s5 # $t1  address of A[i] • lw $t0, 0 ($t1) # $t0  A[i] • add $s1, $s1, $t0 # $s1  g + A[i] • add $s3, $s3, $s4 # $s3  i + j • bne $s3, $s2, Loop # if (i  h) go to Loop

  9. While loop • Base address of A[i] is in $s6; variables i, j, k arein $s3, $s4, $s5. • Compile the following while loop • while (A[i] == k) • i = i + j; • intoMIPS instructions: • Loop: add $t1, $s3, $s3 # $t1  i+i = 2i • add $t1, $t1, $t1 # $t1  2i+2i = 4i • add $t1, $t1, $s6 # $t1  address of A[i] • lw $t0, 0 ($t1) # $t0  A[i] • bne $t0, $s5, Exit # if (A[I]  k) go to Exit • add $s3, $s3, $s4 # $s3  i + j • j Loop # go to Loop • Exit:

  10. Switch/case statement • Variables f - k arein $s0 - $s5.Register $t2 contains constant 4. • Compile the following switch statementintoMIPS instructions • switch (k) { • case 0: f = i + j; break; /* k=0 */ • case 1: f = g + h; break; /* k=1 */ • case 2: f = g - h; break; /* k=2 */ • case 3: f = i - j; break; /* k=3 */ • } • Use the switch variablek to index the jump address table. • First, test for k, if in correct range (0-3). • slt $t3, $s5, $zero # test if k , 0 • bne $t3, $zero, Exit # if k < 0, go to Exit • slt $t3, $s5, $t2 # test if k < 4 • beq $t3, $zero, Exit # if k  4, go to Exit

  11. Switch statement, cont’d • Access jump table T [ ] with addresses L0,L1,L2,L3: • add $t1, $s5, $s5 # $t1  2k • add $t1, $t1, $t1 # $t1  4k • add $t1, $t1, $t4 # $t1  address of T [k] • lw $t0, 0 ($t1) # $t0  T [k] • Use jump register instruction to jump via $t1 to the right address • jr $to # jump based on register $t0 • L0: add $s0, $s3, $s4 # k = 0, so f=$s0  i + j • j Exit # go to Exit • L1: add $s0, $s1, $s2 # k = 1, so f=$s0  g + h • j Exit # go to Exit • L2: sub $s0, $s1, $s2 # k = 2, so f=$s0  g + h • j Exit # go to Exit • L3: sub $s0, $s3, $s4 # k = 3, so f=$s0  i - j • Exit:

  12. A A: CALL B CALL C C: RET RET B: A B A B C A B A Stacks in Procedure Calls Stacking of Subroutine Calls and Returns: Some machines provide a memory stack as part of the architecture (e.g., VAX) Sometimes stacks are implemented via software convention (e.g., MIPS)

  13. Memory Stacks Useful for stacked environments/subroutine call and return Stacks that Grow Up vs. Stacks that Grow Down: 0 Little inf. Big Next Empty? Memory Addresses grows up grows down c b Last Full? a SP inf. Big 0 Little How is empty stack represented? Little --> Big/Last Full POP: Read from Mem(SP) Decrement SP PUSH: Increment SP Write to Mem(SP) Little --> Big/Next Empty POP: Decrement SP Read from Mem(SP) PUSH: Write to Mem(SP) Increment SP

  14. Arguments Callee save registers (old FP, RA) Local variables FP SP Call-Return Linkage: Stack Frames High Mem • Many variations on stacks possible (up/down, last pushed / next ) • Block structured languages contain link to lexically enclosing frame • Compilers normally keep scalar variables in registers, not memory! Reference args and local variables at fixed (positive) offset from FP Grows and shrinks during expression evaluation Low Mem

  15. Compiling a leaf procedure (not nested) • int leaf_example (int g, int h, int i, int j) • { int f; • f = (g + h) – (i + j); • return f; • } • Let parameter variables g, h, i, j, correspond to the argument registers $a0, $a1, $a2, $a3. Will use temp. registers $t0= (g + h) and $t1=(i + j). Function f will be stored in $s0. • Steps: • Save the old values of registers ($s0, $t0, $t1) on stack (push) • Issue a jal sub_address instruction ($ra ret_addr, j sub_address) • Perform the computation for $t0, $t1, $s0 using argument registers • Copy the value of f into a return value register $v0 • Restore the old values of the saved registers from stack (pop) • Finally, jump back to the calling routine, jr $ra • (PC  return_address=PC+4)

  16. Compiling a leaf procedure, cont’d • Leaf_example: # label of the procedure • Save the old values of registers ($s0, $t0, $t1) on stack (push) • sub $sp, $sp, 12 # adjust stack to make room for 3 items • sw $t1, 8 ($sp) # save reg $t1 on stack • ……. # repeat for $t0, $s0 • Perform the computation for $t0, $t1, $s0 using argument registers • add $t0, $a0, $a1 # $t0  g + h • add $t1, $a2, $a3 # $t1  i + j • sub $s0, $t0, $t1 # $s0  (g + h) – (i + j) • Copy the value of f into a return value register $v0 • add $v0, $s0, $zero # returns f ($v0  $s0 + 0) • Restore the old values of the saved registers from stack (pop) • lw $s0, 0 ($sp) # restore reg. $s0 for the caller • ……. # repeat for $t0, $t1 … • add $sp, $sp, 12 # adjust the stack to delete 3 items • Finally, jump back to the calling routine (PC  return address) • jr $ra # PC  $ra

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