1 / 35

Chapter 5 Arithmetic Functions

Chapter 5 Arithmetic Functions. Arithmetic functions Operate on binary vectors Use the same subfunction in each bit position Can design functional block for subfunction and repeat to obtain functional block for overall function Cell - subfunction block

deion
Download Presentation

Chapter 5 Arithmetic Functions

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Chapter 5Arithmetic Functions • Arithmetic functions • Operate on binary vectors • Use the same subfunction in each bit position • Can design functional block for subfunction and repeat to obtain functional block for overall function • Cell - subfunction block • Iterative array - a array of interconnected cells • An iterative array can be in a single dimension (1D) or multiple dimensions Henry Hexmoor

  2. Adders Henry Hexmoor

  3. Block Diagram of a 1D Iterative Array Figure 5-1 • Example: n = 32 • Number of inputs = ? • Truth table rows = ? • Equations with up to ? input variables • Equations with huge number of terms • Design impractical! • Iterative array takes advantage of the regularity to make design feasible Henry Hexmoor

  4. X 0 0 1 1 + Y + 0 + 1 + 0 + 1 C S 0 0 0 1 0 1 1 0 X Y C S 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 Half-Adder 5-2 • A 2-input, 1-bit width binary adder that performs the following computations: • A half adder adds two bits to produce a two-bit sum • The sum is expressed as a sum bit , S and a carry bit, C • The half adder can be specified as a truth table for S and C  Henry Hexmoor

  5. = Å S X Y = × C X Y X S C Y Half Adder5-2 Figure 5-2 Henry Hexmoor

  6. Z 0 0 0 0 X 0 0 1 1 + Y + 0 + 1 + 0 + 1 C S 0 0 0 1 0 1 1 0 Z 1 1 1 1 X 0 0 1 1 + Y + 0 + 1 + 0 + 1 C S 0 1 1 0 1 0 1 1 Full-Adder • A full adder is similar to a half adder, but includes a carry-in bit from lower stages. Like the half-adder, it computes a sum bit, S and a carry bit, C. • For a carry-in (Z) of 0, it is the same as the half-adder: • For a carry- in(Z) of 1: Henry Hexmoor

  7. A B C S C in n 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Full Adder Table Henry Hexmoor

  8. X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 C Y S Y 1 1 1 0 1 3 2 0 1 3 2 X 1 1 1 1 1 X 4 5 7 6 4 5 7 6 Z Z Logic Optimization: Full-Adder • Full-Adder Truth Table: • Full-Adder K-Maps: Henry Hexmoor

  9. = + + + S X Y Z X Y Z X Y Z X Y Z = + + C X Y X Z Y Z = Å Å S X Y Z = + Å C X Y ( X Y ) Z Equations: Full-Adder • From the K-Map, we get: • The S function is the three-bit XOR function: • The Carry bit C is 1 if both X and Y are 1 (the sum is 2), or if the sum is 1 and a carry-in (Z) occurs. Thus C can be re-written as: • The term X·Y is carry generate. • The term XY is carry propagate. Henry Hexmoor

  10. Full Adder Henry Hexmoor

  11. 4 bit Full Adder Henry Hexmoor

  12. 4-bit Ripple-Carry Binary Adder • A four-bit Ripple Carry Adder made from four 1-bit Full Adders. • A carry 1 may propagate through many FAs to the most significant bit just as a wave ripples outward… Figure 5-5 Henry Hexmoor

  13. A3 A2 A1 A0 B3 B2 B1 B0 C3 C2 C1 C0 C4 S3 S2 S1 S0 Carry Propagation & Delay • One problem with the addition of binary numbers is the length of time to propagate the ripple carry from the least significant bit to the most significant bit. • The gate-level propagation path for a 4-bit ripple carry adder of the last example: • Note: The "long path" is from A0 or B0 though the circuit to S3. Henry Hexmoor

  14. Ai Bi Gi Pi Ci Ci+1 Si Carry Lookahead • Given Stage i from a Full Adder, we know that there will be a carry generated when Ai = Bi = "1", whether or not there is a carry-in. • Alternately, there will be a carry propagated if the “half-sum” is "1" and acarry-in, Ci occurs. • These two signal conditions are called generate, denoted as Gi, and propagate, denoted as Pi respectively and are identified in the circuit: Henry Hexmoor

  15. = Å = P A B G A B i i i i i i Carry Lookahead (continued) • In the ripple carry adder: • Gi, Pi, and Si are local to each cell of the adder • Ci is also local each cell • In the carry lookahead adder, in order to reduce the length of the carry chain, Ci is changed to a more global function spanning multiple cells • Defining the equations for the Full Adder in term of the Pi and Gi: = Å = + S P C C G P C + i i i i 1 i i i Henry Hexmoor

  16. = + + + G G P G P P G P P P P G - 0 3 3 3 2 3 2 1 3 2 1 0 0 = P P P P P - 0 3 3 2 1 0 = + C G P C - - 4 0 3 0 3 0 Group Carry Lookahead Logic • Figure 5-6 in the text shows shows the implementation of these equations for four bits. This could be extended to more than four bits; in practice, due to limited gate fan-in, such extension is not feasible. • Instead, the concept is extended another level by considering group generate (G0-3) and group propagate (P0-3) functions: • Using these two equations: • It is possible to have four 4-bit adders use one of the same carry lookahead circuit to speed up 16-bit addition Henry Hexmoor

  17. Subtraction table Henry Hexmoor

  18. Difference D X Y X Half Subtractor D B-out B-OUT Y Half subtractor Henry Hexmoor

  19. Full Subtraction circuit for A - BD = (A B) BIBO = A’(B + BI )+ A BBI Å Å Henry Hexmoor

  20. Binary Subtraction5-3 • Subtraction of two n-digit numbers, M – N • Subtract the subtrahend N from the minuend M. • 2. if no end borrow occurs, then M>= N, • and the result is nonnegative and correct. • 3. If an end borrow occurs, then N > M, • and the difference, M – N + 2n, is subtracted from 2n, • and a minus sign is appended to the result. • See Example 5-1 and Figure 5-7 0 1 1001 0100-0111-0111 0010 1101 10000-1101 (-)0011 A Henry Hexmoor

  21. Adder-subtractor Figure 5-7 Henry Hexmoor

  22. Complements5-3 1’s complement of a binary n digit number N is obtained by changing all 1’s to 0 and all 0’s to 1. 2’s complement of a binary n digit number N is obtained by adding 1 to its 1’s complement. e.g., 1’s complement: 1011001  0100110 0001111  1110000 2’s complement: 10110  010011 + 1 = 010100 Henry Hexmoor

  23. Alternate 2’s Complement Method • Given: an n-bit binary number, beginning at the least significant bit and proceeding upward: • Copy all least significant 0’s • Copy the first 1 • Complement all bits thereafter. • 2’s Complement Example: 10010100 • Copy underlined bits: 100 • and complement bits to the left: 01101100 Henry Hexmoor

  24. Subtraction with complements5-3 • Add the 2’s complement of the subtrahend N to the minuend M. • If M>= N, the sum produces an end carry, 2n. • Discard the end carry, leaving result M – N. • If M < N, the sum does not produce an end carry • since it is equal to 2n – (N – M), the 2’s complement of N –M. • Perform a correction, taking the 2’s complement of the sum • and placing a minus sign in front to obtain the result – (N – M). OR Gate A Henry Hexmoor

  25. Unsigned 2’s Complement Subtraction Example 1 • Find 010101002 – 010000112 01010100 01010100 – 01000011 + 10111101 00010001 • The carry of 1 indicates that no correction of the result is required. 1 2’s comp Henry Hexmoor

  26. Binary Adder-Subtractors5-4 S = 0, adder S = 1, subtractor Figure 5-8 OR Gate A Henry Hexmoor

  27. Overflow Detection • Overflow occurs if n + 1 bits are required to contain the result from an n-bit addition or subtraction • Overflow can occur for: • Addition of two operands with the same sign • Subtraction of operands with different signs • Detection can be performed by examining the result signs which should match the signs of the top operand Henry Hexmoor

  28. Two bit Multiplication Henry Hexmoor

  29. 1 0 1 × 0 1 1 1 0 1 1 0 1 0 0 0 0 0 1 1 1 1 Three bit Multiplication • Partial products are: 101 × 1, 101 × 1, and 101 × 0 • Note that the partial productsummation for n digit, base 2numbers requires adding upto n digits (with carries) ina column. • Note also n× m digit multiply generates up to an m + n digit result (same as decimal). Henry Hexmoor

  30. Multiplier Boolean Equations • We can also make an n×m “block” multiplier and use that to form partial products. • Example: 2 × 2 – The logic equations for each partial-product binary digit are shown below: • We need to "add" the columns to getthe product bits P0, P1, P2, and P3. • Note that some columns may generate carries. b1 b0 ´ a1 a0 . . (a0 b1) (a0 b0) . . + (a1 b1) (a1 b0) P3 P2 P1 P0 Henry Hexmoor

  31. A 2x2 binary multiplier • The AND gates produce the partial products. • For a 2-bit by 2-bit multiplier, we can just use two half adders to sum the partial products. In general, though, we’ll need full adders. • Here C3-C0 are the product, not carries! HA HA Henry Hexmoor

  32. Multiplication: a special case • In decimal, an easy way to multiply by 10 is to shift all the digits to the left, and tack a 0 to the right end. 128 x 10 = 1280 • We can do the same thing in binary. Shifting left is equivalent to multiplying by 2: 11 x 10 = 110 (in decimal, 3 x 2 = 6) • Shifting left twice is equivalent to multiplying by 4: 11 x 100 = 1100 (in decimal, 3 x 4 = 12) • As an aside, shifting to the right is equivalent to dividing by 2. 110 ÷ 10 = 11 (in decimal, 6 ÷ 2 = 3) Henry Hexmoor

  33. Other Arithmetic Functions5-7 • Convenient to design the functional blocks by contraction - removal of redundancy from circuit to which input fixing has been applied • Functions • Incrementing • Decrementing • Multiplication by Constant • Division by Constant • Zero Fill and Extension Henry Hexmoor

  34. HW 5 • Perform the indicated subtraction with the following unsigned binary numbers by taking the 2’s complement of the subtrahend: • 1111 – 10000, (b) 10110 – 1111, (c) 101111 – 1011110, (d) 101 – 101000 (Q 5-4) 2. Design a circuit that multiplies two 4-bit unsigned numbers. Use AND gates and binary adders. (Q 5-18) Henry Hexmoor

  35. Henry Hexmoor

More Related