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CSNB374: Microprocessor Systems

CSNB374: Microprocessor Systems. Chapter 4: Common x86 Instructions. Addressing Modes. Many instructions, such as MOV, operates on two operands. MOV dest, source Addressing mode indicates where the operands are located. There are various addressing modes in x86.

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CSNB374: Microprocessor Systems

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  1. CSNB374: Microprocessor Systems Chapter 4: Common x86 Instructions

  2. Addressing Modes • Many instructions, such as MOV, operates on two operands. • MOV dest, source • Addressing mode indicates where the operands are located. • There are various addressing modes in x86. • Register, immediate, direct, register indirect, base-plus-index, register relative, base relative-plus-index, scaled index (80386 and above), RIP relative (64-bit Pentium 4 and above).

  3. Addressing Modes

  4. Register Addressing • Instruction gets its source data from a register. • Data resulting from the operation is stored in another register. • Data length depends on register being used. • 8-bit registers: AH, AL, BH, BL, CH, CL, DH, DL. • 16-bit registers: AX, BX, CX, DX, SP, BP, SI, DI. • 32-bit registers: EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI. • 64-bit registers: RAX, RBX, RCX, RDX, RSP, RBP, RDI, RSI, and R8 through R15.

  5. Register Addressing • Examples: • MOV AX, BX ;Copy the 16-bit content of BX to AX • MOV AL, BL ;Copy the 8-bit content of BL to AL • MOV SI, DI ;Copy DI into SI • MOV DS, AX ;Copy AX into DS • Note that the instruction must use registers of the same size. • Cannot mix between 8-bit and 16-bit registers. • Will result in an error when assembled.

  6. Immediate Addressing • The source data is coded directly into the instruction. • The term immediate means that the data immediately follows the hexadecimal opcode in the memory. • Immediate data are constant data. • Examples: • MOV AX, 100 • MOV BX, 189CH • MOV AH, 10110110B

  7. Direct Data Addressing • The operand is stored in a memory location, usually in data segment. • The instruction takes the offset address. • This offset address must be put in a bracket [ ]. • Example: • MOV [1234H], AL • The actual memory location is obtained by combining the offset address with the segment address in the segment register DS (unless specified otherwise). • If we want to use another segment register such as ES, you can use the syntax ES:[1234H] • Assuming DS = 1000H, then this instruction will move the content of AL into the memory location 11234H.

  8. Register Indirect Addressing • Similar to direct data addressing, except that the offset address is specified using an index or base register. • Base registers = BP, BX. Index registers = DI, SI. • In 80386 and above, any register (EAX, EBX, ECX, EDX, EBP, EDI, ESI) can store the offset address. • The registers must be specified using a bracket [ ]. • DS is used as the default segment register for BX, DI and SI. • Example: • MOV AX, [BX] • Assuming DS = 1000H and BX = 1234H, this instruction will move the content memory location 11234H and 11235H into AX.

  9. Base-plus-index Addressing • Similar to register indirect addressing, except that the offset address is obtained by adding a base register (BP, BX) and an index register (DI, SI). • Example: • MOV [BX+SI], BP • Assuming DS = 1000H, BX = 0300H and SI = 0200H, this instruction will move the content of register BP to memory location 10500H.

  10. Register Relative Addressing • Similar to register indirect addressing, except that the offset address is obtained by adding an index or base register with a displacement. • Example 1: • MOV AX, [DI+100H] • Assuming DS = 1000H and DI = 0300H, this instruction will move the content from memory location 10400H into AX. • Example 2: • MOV ARRAY[SI], BL • Assuming DS = 1000H, ARRAY = 5000H and SI = 500H, this instruction will move the content in register BL to memory location 15500H.

  11. Base Relative-plus-index Addressing • Combines the base-plus-index addressing and relative addressing. • Examples: • MOV AH, [BX+DI+20H] • MOV FILE[BX+DI], AX • MOV LIST[BP+SI+4], AL

  12. Arithmetic Instructions • In Chapter 3, we have learned the following arithmetic instructions: • ADD, SUB, INC, DEC, NEG • For many arithmetic and logic instructions, the various addressing modes explained in the previous section can be applied. • There are various types of arithmetic and logic operations. • Some of them have several variations. • In addition to binary arithmetic operations, there are also BCD or ASCII arithmetic operations.

  13. Comparison • CMP – used to compare two values. • Internally, it performs a subtract operation. • But the destination operand will not be changed. • Only the flag bits will be changed. • Flag bits that can change: C, P, A, Z, S and O. • Syntax: • CMP dest, source • CMP is normally followed by a conditional jump instruction.

  14. Multiplication • Performed on bytes, words or doublewords. • Can be unsigned (MUL) or signed (IMUL). • Product of a multiplication is always a double-width product. • Two 8-bit numbers multiplied generate a 16-bit product. • Two 16-bit numbers multiplied generate a 32-bit product. • Syntax: • MUL multiplier • IMUL multiplier

  15. Multiplication • 8-bit multiplication • Multiplicand is always in the AL register. • Multiplier can be any 8-bit register or memory location. • The product is stored in AX. • 16-bit multiplication • Multiplicand is always in the AX register. • Multiplier can be any 16-bit register or memory location. • The product is stored in DX-AX.

  16. Division • Performed on bytes, words or doublewords. • Can be unsigned (DIV) or signed (IDIV). • Dividend is always double-width, divided by the operand (divisor). • Syntax: • DIV divisor • IDIV divisor • Division can result in two types of error (which will generate an interrupt): • Attempt to divide by 0. • Divide overflow (the resulting quotient cannot fit into the output register).

  17. Division • 8-bit division • Dividend is stored in the AX register. • Divisor can be any 8-bit register or memory location. • Quotient stored in AL, remainder stored in AH. • 16-bit division • Dividend is stored in the DX-AX registers. • Divisor can be any 16-bit register or memory location. • Quotient stored in AX, remainder stored in DX.

  18. Logic Instructions • Syntax of basic logic instructions: • AND dest, src ; dest = dest AND src • OR dest, src ; dest = dest OR src • XOR dest, src ; dest = dest XOR src • NOT dest ; dest = 1’s comp of dest • All logic operations affect the flag bits. • Carry and overflow flags will be cleared. • Other flag bits are changed accordingly to reflect the result.

  19. Test Instruction • TEST – test one value against another. • Internally, it performs the AND operation. • However, it does not change the destination operand. • Only affect the flag bits. • Syntax: • TEST dest, source • TEST is normally followed by a JZ or JNZ jump instructions.

  20. Shift Instructions • Shift numbers in a register or memory location to the left or right. • Two types of shift: • Logical shift – used for unsigned data. • Arithmetic shift – used for signed data. • There are four shift instructions: • SHL – logical shift left • SHR – logical shift right • SAL – arithmetic shift left • SAR – arithmetic shift right

  21. Shift Instructions

  22. Shift Instructions • Syntax: • SHL dest, shift_count • The shift_count can either be an immediate value or the CL register. • The other shift instructions have the same syntax. • Shift is also a “cheap” way to perform multiplication or division by 2n. • Shift left n times will multiply a number by 2n. • Shift right n times will divide a number by 2n.

  23. Rotate Instructions • Similar to shift, except that the shifted out bit(s) are wrapped around the other end. • Two types of rotate: • Rotate without going through carry bit. • Rotate through carry bit. • There are four types of rotate operations: • ROL – rotate left • ROR – rotate right • RCL – rotate through carry left • RCR – rotate through carry right • Syntax for rotate is similar to shift.

  24. Rotate Instructions

  25. Stack • The stack plays an important role in all microprocessors. • Holds data temporarily. • Stores return addresses used by procedures. • Stack memory is a LIFO memory. • The bottom of the stack is at the highest memory location assigned for the stack. • The location of the stack area is maintained by two registers: • Stack pointer (SP) • Stack segment register (SS)

  26. Stack • Assembler and linker programs place correct stack segment address in SS and the length of the segment (top of the stack) into SP. • No need to load these registers manually in the assembly program. • Data transfer involving the stack is always in 16-bit. • Two main stack instructions: • PUSH – put data on the top of the stack • POP – retrieve data from the top of the stack

  27. Push Instruction • Stores the content of a 16-bit register or memory location at the top of the stack. • Syntax: • PUSH src • Calling the PUSH instruction would result in: • Stack[SP-1] = high-order 8-bits of data • Stack[SP-2] = low-order 8-bits of data • SP = SP – 2

  28. Push Instruction

  29. Pop Instruction • Removes 16-bit data from the stack and places it into a 16-bit register or memory location. • Syntax: • POP dest • In addition to copying data at the top of the stack into a register or memory location, calling POP also changes SP. • SP = SP + 2 • The popped data will no longer be available in the stack.

  30. Pop Instruction

  31. Other Variations of Push and Pop • PUSHF • Push the 16-bit flag register. • POPF • Get data from stack and put it into the flag register. • PUSHA (available in 80286 and above) • Push all registers into the stack in the following order: AX, CX, DX, BX, SP, BP, SI, and DI. • POPA (available in 80286 and above) • Removes 16 bytes of data from the stack and places them into the following registers, in the following order: DI, SI, BP, SP, BX, DX, CX, and AX.

  32. Jump Instructions • Allow programmer to skip program sections and branch to any part of memory for the next instruction. • There are two types: • Unconditional jump • Always jump. • Conditional jump • Jump based on the values of flag bits after a numerical test (e.g. CMP or TEST).

  33. Unconditional Jump • Syntax: • JMP label • After the JMP instruction, the program will execute the instruction specified by the label instead of the subsequent instruction. • The instruction label must be followed by a colon (e.g. NEXT:) to allow instruction to reference it for a jump. • It is also possible to do an indirect jump using a register or a memory index. • The address to jump to is in the register/memory.

  34. Conditional Jump • Test flag bits. • Sign (S), zero (Z), carry (C), parity (P), overflow (O). • There are various opcodes, each test a different flag bit(s). • If the condition under test is true, the program will jump to the instruction specified by the label. • Otherwise, the program will execute the subsequent instruction.

  35. Conditional Jump • This allows the assembly program to perform an if-else or a loop. • Since the ordering of signed and unsigned numbers are different, there are two sets of conditional jump instructions for magnitude comparison. • Magnitude comparison is done using the CMP instruction.

  36. Order of Signed and Unsigned Numbers

  37. Conditional Jump for Unsigned Numbers • JA (Jump if above) • Z = 0 and C = 0 • JB (Jump if below) • C = 1 • JAE (Jump if above or equal) • C = 0 • JBE (Jump if below or equal) • Z = 1 or C = 1 • JE (Jump if equal) or JZ (Jump if zero) • Z = 1 • JNE (Jump of not equal) or JNZ (Jump if not zero) • Z = 0

  38. Conditional Jump for Signed Numbers • JG (Jump if greater than) • Z = 0 and S = 0 • JL (Jump if less than) • S != 0 • JGE (Jump if greater than or equal) • S = 0 • JLE (Jump if less than or equal) • Z = 0 or S != 0 • JE (Jump if equal) or JZ (Jump if zero) • Z = 1 • JNE (Jump of not equal) or JNZ (Jump if not zero) • Z = 0

  39. Other Conditional Jumps • JO (Jump if overflow) • O = 1 • JNO (Jump if no overflow) • O = 0 • JS (Jump if sign) – negative • S = 1 • JNS (Jump if no sign) – positive • S = 0 • JP (Jump if parity) or JPE (Jump if parity even) • P = 1 • JNP (Jump if no parity) or JPO (Jump if parity odd) • P = 0 • JCXZ (Jump if CX zero) • CX = 0

  40. Loop • The LOOP instruction is a combination of a decrement CX and the JNZ conditional jump. • To ease counted loop operation. • Syntax: • LOOP label • The number of times to loop is loaded into register CX. • For each loop, the value in CX will be decremented by one.

  41. Loop • When the LOOP instruction is executed: • If CX != 0, jump to the address specified by the label. • If CX == 0, execute the next sequential instruction. • Other variations of LOOP: • LOOPE (Loop while equal) • Loop while CX != 0 and Z = 1. • LOOPNE (Loop while not equal) • Loop while CX != 0 and Z = 0.

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