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CLIC NI Acquisition and Control Module update

CLIC NI Acquisition and Control Module update. CLIC Module Working group meeting 3-10- 2013 Adriaan Rijllart EN-ICE-MTA. Content. CLIC ACM requirements Motivation for NI systems Inventory of signals Prototype system proposal Miniaturisation Planning Summary. ACM requirements.

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CLIC NI Acquisition and Control Module update

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  1. CLICNI Acquisition and Control Moduleupdate CLIC Module Working group meeting 3-10-2013 Adriaan Rijllart EN-ICE-MTA

  2. Content • CLIC ACM requirements • Motivation for NI systems • Inventory of signals • Prototype system proposal • Miniaturisation • Planning • Summary CMWG - A. Rijllart

  3. ACM requirements • 23000 modules-2m length-200 signals/module- details in excel file- large variety of signal sources (18 GHz wakefield monitor to DC temperature sensors or flow-meters)- requested readout speed: up to 100 Hz- single value readouts or vector readouts- FE electronics needs external timing reference with ps stability • Standard industrial solution with crates and individual modules will explode available budget • TDR phase of CLIC (2011-2016) will seek industrial “custom solution” CMWG - A. Rijllart

  4. Motivation for NI-PXI systems • Industrial standard • Hardware and software made to work together • Large offer • 600 alliance partners world wide • Good support CMWG - A. Rijllart

  5. Inventory of signals CMWG - A. Rijllart

  6. NI DAQ modules CMWG - A. Rijllart

  7. NI system proposal CMWG - A. Rijllart

  8. NI system cost CMWG - A. Rijllart

  9. NI system overview Controller DIO Serial Synchro IEEE-1588 Fast ADC DIO + Slow ADC + DAC CMWG - A. Rijllart

  10. FlexRIO architecture CMWG - A. Rijllart

  11. FPGA controller • Fiber-Optic MXI-Express x4 link, PXIe-PCIe8375 • 838 MB/s sustained transfer rate • Remote control of PXIe crate • Cost 5.5 kCHF CMWG - A. Rijllart

  12. Next steps NI-ACM • Functional validation (DAQ, timing, data transfer) • Purchase system with FPGA based controller • Communication test with optical fibre (length) • Validate on Module Test Stand • Develop White Rabbit FPGA controller • Radiation resistance test? • Controller + DAQ boards CMWG - A. Rijllart

  13. White Rabbit-FPGA controller • Development by NI • White Rabbit timing signal decoding • Loop back in the daisy chain • Estimated cost 25 kCHF • The White Rabbit timing should be decoded on the FPGA • The loop back mechanism should be implemented, if we want to be protected from a single fibre fault CMWG - A. Rijllart

  14. Miniaturisation • Final system requirements: • cheap • consuming little power • easy cooling (conduction?) • small • Solution: • Miniaturise 15 boards into 1 small box • NI has long experience with custom design CMWG - A. Rijllart

  15. CMW integration • OASIS compatibility • Choices: • FESA 3 • Lightweight CMW client • A short study needed to compare the 2 solutions CMWG - A. Rijllart

  16. NI-ACM (+ RF) Planning CMWG - A. Rijllart

  17. Summary • NI system can fit the ACM requirements • Miniaturisation can solve the cost, power, cooling and space requirements • Proposed program: • Validation of NI-ACM functionality: 120 kCHF • Fibre optic controller: 5 kCHF • WR timing and loop back development: 25 kCHF CMWG - A. Rijllart

  18. Thank you • Questions? CMWG - A. Rijllart

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