250 likes | 413 Views
IBM Formal Verification and Testing Solutions Presentation to OCP-IP Compliance Summit. Software & Verification Technologies IBM Haifa Labs. Dr. Yaron Wolfsthal June 3 2004. IBM Research Worldwide – Supporting IBM Products Worldwide. IBM Haifa Research Lab – Background. Founded in 1972
E N D
IBM Formal Verification and Testing Solutions Presentation to OCP-IP Compliance Summit Software & Verification Technologies IBM Haifa Labs Dr. Yaron Wolfsthal June 3 2004
IBM Haifa Research Lab – Background • Founded in 1972 • One of 8 IBM Research Division Labs • Largest IBM Research lab outside the US • Staff of 500 persons • Significant influence across IBM • Verification strategy • Verification responsibilities
Engineering Services MD Products MD Products IBM Products Strategic Licensing PowerPC "Cell" • Server • Embedded Blue Logic EU Projects Verification & Tool Teams University Program Classification of Customers IBM Research Division External Partnerships Formal Verification and Testing Technologies
? = Assertion-Based Verification • Specification Design Functional Requirements- Collectively called assertions Computations are "correct“” Data transferred properly Protocols are followed etc
Summary of IBM’s Assertion-Based Verification Solutions • PSL/Sugar - Formal Specification Language for Assertions • Formal Model Checking – with RuleBase • FoCs - Use of Formal Specifications in simulation
PSL/Sugar – Standard Assertion Specification Language • Language originally invented by IBM circa 1994 • Used by IBM and industrial partners • Donated by IBM to Accellera for standardization • LRM (1.01) complete 1/03, approved by Accellera Board May 29, 2003 • Version 1.1 completed, approval by board in expected DAC04 • Highlights • Simple, intuitive, expressive • As industry standard, supported by many vendors • General-purpose
Formal Verification of Properties • Answer questions like • does the design satisfy these properties e.g. • "Request will be always Processed within 3 cycles" • Inputs: • The design • Input constraints(legal input behavior) • The propertiesto verify • Output: • A documented pass/fail answer (with error/witness trace)
The RuleBase Product Line: The IBM Formal Property Checking Platform • RuleBase Parallel Edition (PE) announced January 2003 • Performs formal and semiformal property checking of large industrial designs • Based on state-of-art algorithms (BDD + SATisfiability Checking) • Used extensively across IBM, by external licensees, and in academia • Awarded "IBM Outstanding Research Accomplishment Award" • For estimated innovation value of ~ $100M
Formal Verification, the Next Frontier: High Performance FV • RuleBase PE employs a technology called “Parallel Formal Verification”, which marries traditional FV techniques with parallel computing methods • Metaphorically, RuleBase PE is a “Formal Verification supercomputer” on your desk
Formal Verification of Gigabit Ethernet Core, 2002-2003 • 400,000 gates • 40% of logic went through Formal ABV • Formal ABV practiced by 3 engineers out of a team of 10 • Formal ABV found 33% of documented design bugs • Zero bugs found in logic that went through Formal ABV • Late Formal ABV found bugs in areas that were heavily simulated IBM Microelectronics, Haifa Design Center http://www/pslsugar.org/papers/ABV-in-IBM-Haifa.pdf
scheduled time actual time(H) bugs size No of interfaces • in out • ITP 6W = 120H 160 - 170 15 30293 21 48 • TCL 9W = 180H 163 6 27384 25 27 • TNP 5W = 100H 56 3 6274 13 21 • RCP 5W = 100H 85 - 16286 29 14 • SWI 4W = 80H 70 2 16257 23 15 • MWI 5W = 80H 161 4 19959 14 18 • TCP 4W = 80H 106 2 18345 17 8 Formal Verification Statistics – Debriefing , UTL Core, 9/03
FoCs Productivity Advantages • Low-cost setup of simulation testbenches • Manual writing and maintenance of checkers is high-cost (especially for complex, temporal properties, e.g. overlapping transactions) • Conciseness and expressiveness of PSL, a standard language • Significantly fewer errors in Checkers • Debugging, maintenance, porting, reuse - highly cost effective • Further applicability to coverage analysis and FV
IBM Products pSeries - Regatta (p690) pSeries – Power4-5-6 pSeries - HPC (SP, ASCI) zSeries - Freeway iSeries - AS/400 x-Series - Netfinity MD Game Processors MD Cores - PCI/USB/Ethernet... Deployment of RuleBase across IBM Product Lines Power4
Proposal for OCP-IP Members • The Formal Verification and Testing Technologies in the IBM Haifa Lab will help OCP-IP members embrace and leverage the emergent technology of assertion-based verification: • PSL • FoCs • RuleBase Parallel Edition
PSL Proposal • HRL’s FVTT area will provide advice, guidance and consulting to OCP-IP members wishing to • educate staff on PSL and ABV • implement in-house ABV tools and applications based on PSL • typical application: OCP Protocol Checking Library • Guidance include open-source (free) PSL parser and testing materials; classes and services on a commercial basis • HRL’s FVTT area has successfully provided support and worked with EDA vendors and end-user companies to launch commercial PSL initiatives • Example: PSL/Sugar Consortium
FoCs Proposal • HRL’s FVTT area will provide end-user license of FoCs – which is an entry level tool for PSL-based ABV – to OCP-IP members at significant discounts • Non-member price • 1 year personal subscription of Additional Features Edition - $1500 • Perpetual license - 5000$ + 5% annual maintenance fee • OCP-IP member discounts • First free copy to member +33% discount (assumption: #seats > 5) • Volume discounts • Two working/training copies to OCP-IP VWG at no cost
RuleBase PE Proposal • HRL’s FVTT area will provide end-user license of RuleBase Parallel Edition – a high performance PSL-based platform for formal property verification – to OCP-IP members at competitive terms • Non-member price: $120K for 24 tokens (equivalent of 4 seats)
Specific Deliverables • All components of proposal include • Tools (multi platform) • Literature (user guides) • Education framework • Support infrastructure
Benefits of Proposal to OCP-IP Members • Higher design quality via systematic coverage of logic with IBM’s ABV technology • When modules are properly selected, assurance is feasible • Evasive corner cases are found • Reduced risk and higher productivity due to better verification at lower levels • Integration is shorter when modules are verified in advance – leading to shorter TTM • Access to IBM ABV technology – ongoing source of innovation
Scope of Work • No development work is required • Otherwise, work includes delivery, education, dissemination, support
Model for Implementation • Decision by OCP-IP • Communication of interest to IBM • Connection between IBM Licensing Dept in NY and OCP-IP • Launch • Verification services may also be available from IBM