WLAN for High Performance Networks Combined with Multi-core Microarchitecture

1. WLAN for High Performance Networks Combined with Multi-core Microarchitecture KireetKokala

2. OVERVIEW: • Network types brief history • Advantages vs. Disadvantages • CPU Multi-core microarchitecture • Research (ANARG & Coskun et. al) breakdown • Single core problems & multi-core remedies • WLAN types, evolution, & issues • Conclusion & future research direction • Questions

3. INTRODUCTION: • Internet usage and power consumption for computing needs has risen  IT boom. • Increased high speed internet availability has prompted multiple NextG wireless networks. • Mainly for communication  rise in handheld communication devices. • Moore’s Law  CPU speed thresholds approached with core-duo and quad-core technologies.

4. NETWORKS: • Rough definition: built on multiple computers connected through a telecommunications system to support a range of activities. • Fairly common network types: personal area network (PAN), local area network (LAN), wide area network (WAN), & wireless local area networks (WLAN).

5. NETWORKS (contd): • 1999: Inception of 802.11a standard  30m range and 54 Mb/s speed. • IT industry growth, datacenters, residential high speed internet use occur steadily. • 2001+: 802.11 b-g emerge  “g” network devices are backwards compatible with “a” and “b”. • Traditional encryption is 64bit or 128bit; newer implementation is WEP and TKIP authentication.

6. NETWORKS (contd): Advantages Disadvantages • A local area network might toot speed over a traditional CAN (campus area network). • Router and firmware costs initially make WLANs more expensive. • Uses adaptive QoS Architecture (Quality of Service). • WLAN has the ante on range (with less clutter) and mobility. • LAN equipment can get quite expensive with large bandwidth requirements. • Prone to vulnerabilities such as DoA attacks. Discrepancies in network performance  Coskun indicates a strong correlation in the 95 nm process of chip making for single core systems.

7. MULTI-CORE MICROARCHITECTURE: • Many systems on computer chips have increasing cores, communication and storage elements integrated. • Vital  transistors integrated on a single chip lead to higher power consumption & temperature increase. • Thus, power management and system reliability get affected.

8. POWER MANAGEMENT: • Dynamic Voltage Scaling (DVS) & Dynamic Power Management (DPM)  geared towards boosting speed and decreasing power consumption. • Often the methods are combined or work in tandem because aggressive power management can have an impact on reliability due to temperature cycling.

9. RESEARCH (Coskun et. al): • Proposed alignment techniques of processors on a • single (95 nm or smaller) dye to increase energy savings. • Used a micro-architectural level statistical simulator on several CPU speeds (0-624 MHz+) and found 40% increased energy savings. • Model can be used to optimize single or multiple cores, but lower simulation times were found with increasing cores reacting positively to DPM at 500C.

10. STATISTICAL SIMULATOR: • Joint • optimization • method is • credited for the • 40% increase in • energy savings. • Their statistical simulation achieves the possibility by merging the voltage scaling, power management, and reliability. • DVS policies: reduce the time spent between idle and sleep states  transitioning to active states quickly enhances natural core operation.

11. NETWORKS (revisited): • Basic idea is that multi-core performance increases network throughput! • So, what does the new 802.11n standard provide? • SECURITY: the operational frequency of previously described networks ranges from 2.4 GHz to 2.5 GHz. They’re subject to monitoring/tempering  sensitive data may be captured for illegal distribution. • 802.11n uses 5 GHz frequency and MIMO (multiple-input multiple-output) while deterring common attacks such as “jamming”.

12. NETWORKS (revisited): • Another advantage is the quadruple speed of 160 Mb/s (200 Mb/s theoretical), upto twice the range of Wi-Fi “g”, and lesser interference. • This provides for increased bandwidth access to traditional internet use, rising VOIP usage, streaming live data, and hand-held device communication at even 300ft.

13. CONCLUSION: • Increasing the number of cores would react congenially with DPM and allow for hardware-assisted system algorithms to better assign processes using methods such as FCFS, SJF, RR or a combination of algorithms to increase CPU usage while reducing idle time. • Moore’s Law poses a problem with the future octa-core model.

14. SOLUTION & FUTURE DIRECTION : • Solution to battling the host of problems with octa-core processor heat issues would be a hardware driven change of multiple processor alignment on a single dye or a software driven approach. • ANARG suggests use of more “n” oriented access points that boost signals and authenticate systems on the network more efficiently  maintaining constant uptime.

15. REFERENCES: • Advanced Network Architecture Research Group (ANARG) http://www-mura.ist.osaka-u.ac.jp/research-e.html • Coskun, A., Rosing, T., Mihic, K., Micheli, G., and Leblebici, Y. Analysis and Optimization of MPSoC Reliability. (2006) J. Low Power Electronics 2, 56-692 • Berezdivin, R., Breinig, R., and Topp, R. Next-generation wireless communications concepts and technologies. Communications Magazine, IEEE (2007) v45, 2, 12 • Rose, G., and Lyytinen, K. The Quad-Core Model—Innovation. Twenty-Second International Conference on Information Systems (2001) • Silberschatz, A., Galvin, G., and Gagne, P. Operating System Concepts (2005)