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CHAPTER 3

CHAPTER 3. Counter Application (Part A) By : Pn Siti Nor Diana Ismail. Outlines. Up/down synchronous counter Cascade counter Counter decoding Design counter application. i. Up/down synchronous counter. It capable of progressing in either direction through a certain sequence.

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CHAPTER 3

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  1. CHAPTER 3 Counter Application (Part A) By : Pn Siti Nor Diana Ismail

  2. Outlines • Up/down synchronous counter • Cascade counter • Counter decoding • Design counter application

  3. i. Up/down synchronous counter • It capable of progressing in either direction through a certain sequence. • Also known as ‘bidirectional counter’ – can have specified sequence state.

  4. 3-bit binary up/down synchronous counter

  5. Basic Operation for 3-bit binary • Jo = Ko = 1,FF0 toggles each clock pulse • J1 = K1 = 1, J1 = K1 = (Qo.UP)+(Qo.DOWN) UP sequence : Q1 change state when Qo=1, DOWN sequence : Q1 change state when Qo=0, • J2 = K2 = 1, J1 = K1 = (Qo.Q1.UP)+(Qo.Q1.DOWN) UP sequence : Q2 change state when Qo=Q1=1, DOWN sequence : Q2 change state when Qo=Q1=0,

  6. Up/Down sequence for 3-bit binary counter

  7. Example 1 : 3-bit Up/down counter Show the timing diagram for a 3-bit binary counter based on the following sequence, 0,1,2,3,2,1,2,3,4,5,6,5,4,3,2,1,0 Indicate the counter is in the UP mode or DOWN mode. Assume positive edge triggering.

  8. T I M I N G D I A G R A M UP DOWN UP DOWN

  9. Example 2 : 4-bit Up/down counter • Show the timing diagram and determine the sequence of a 4-bit synchronous binary up/down counter if the counter and UP/DOWN control inputs have waveform shown in figure. • Start at 0s state and +ve triggered

  10. TIMING DIAGRAM UP DOWN UP DOWN

  11. Design of synchronous counter • To design a synchronous counter, a general procedure design is applied to sequential circuit : • State diagram • Next state table • Flip-flop transition table • K-map • Logic expression FF input • Counter implementation

  12. Example 1: Designing a counter • Design a counter with the binary count sequence shown in the state diagram below. Use J-K Flip-flop

  13. Example 2: Designing a counter • Design a counter with the irregular binary count sequence shown in the state diagram below. Use J-K Flip-flop

  14. Continue to next class

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