1 / 6

Project Main Requirements:

duc
Download Presentation

Project Main Requirements:

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. A NEW GENERATION OF DATA AND CONTROL INTERFACES FOR DIGITAL DETECTORSF. Bortoletto1, M. D’Alessandro1, E. Giro1, R. Cosentino2, M. Belluso2, A. Carbone3, M. Gemma31INAF-Osservatorio Astronomico di Padova Italy,2INAF-Osservatorio Astronomico di CataniaItaly, 3SKYTECH LaSpezia Italy SDW2005 - TAORMINA

  2. Project Main Requirements: • Upgrade for the precedent generation of transputer based VME/VSB boards saving compatibility with high level SW (table editors) 2. Compatibility with modern bus architecture, I.E.: PCI, CPCI, VME and modern bus-adapters (AMCC chips) • Use of host computer memory for data storage via PCI fast data transfers • Use of fast throughput, full-duplex, data & controls link between host interface and remote electronics • On board (host interface) generation of detector clock sequences and transmission through the fast control link SDW2005 - TAORMINA

  3. The PCI model for the sequencer/interface board: Simplified PCI version for the sequencer/interface board PCI sequencer/interface board main functions SDW2005 - TAORMINA

  4. The PMC model for the sequencer/interface board: Dual slots PMC piggy-back detector interface mounted on a Motorola C-PCI CPU The PMC module can be mounted in a variety of VME/C-PCI boards. It implements the same concept found on the PCI version with the presence of a large, host computer, configurable FPGA dedicated to the implementation of fast local functions on the data-flow PMC sequencer & detector Interface main functions SDW2005 - TAORMINA

  5. The Remote Glue Logic Board: Example of Glue-Logic remote board with programmable clocks, services, telemetry and system bus implemented on a 8 layers SMD double-euro card Glue-Logic is embedded on a Xilinx FPGA. It provides communication with the PCI/PMC host I/F board and all the logics for the implementation of a detector controller in a scalable way SDW2005 - TAORMINA

  6. System Expansion for High Number of Video Channels: GLUE-LOGIC BOARDS A common synchronization line driven by a master PCI/PMC interface allows expansion to a distributed acquisition system. SDW2005 - TAORMINA

More Related