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THE INVERTERS

THE INVERTERS. DIGITAL GATES Fundamental Parameters. Functionality Reliability, Robustness Area Performance Speed (delay) Power Consumption Energy. Noise in Digital Integrated Circuits. DC Operation: Voltage Transfer Characteristic. Mapping between analog and digital signals.

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THE INVERTERS

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  1. THE INVERTERS

  2. DIGITAL GATES Fundamental Parameters • Functionality • Reliability, Robustness • Area • Performance • Speed (delay) • Power Consumption • Energy

  3. Noise in Digital Integrated Circuits

  4. DC Operation: Voltage Transfer Characteristic

  5. Mapping between analog and digital signals

  6. Definition of Noise Margins

  7. The Regenerative Property

  8. Fan-in and Fan-out

  9. The Ideal Gate

  10. VTC of Real Inverter

  11. Delay Definitions

  12. Ring Oscillator

  13. Power Dissipation

  14. CMOS INVERTER

  15. The CMOS Inverter: A First Glance

  16. V DD PMOS Metal1 Polysilicon NMOS CMOS Inverters 1.2 m m =2l Out In GND

  17. Switch Model of CMOS Transistor

  18. CMOS Inverter: Steady State Response

  19. CMOS Inverter: Transient Response

  20. CMOS Properties • Full rail-to-rail swing • Symmetrical VTC • Propagation delay function of load capacitance and resistance of transistors • No static power dissipation • Direct path current during switching

  21. Voltage TransferCharacteristic

  22. CMOS Inverter VTC

  23. Simulated VTC

  24. Gate Switching Threshold

  25. MOS Transistor Small Signal Model

  26. Determining VIH and VIL

  27. Propagation Delay

  28. CMOS Inverter: Transient Response

  29. CMOS Inverter Propagation Delay

  30. Computing the Capacitances

  31. V DD PMOS Metal1 Polysilicon NMOS CMOS Inverters 1.2 m m =2l Out In GND

  32. The Miller Effect

  33. Computing the Capacitances

  34. Impact of Rise Time on Delay

  35. Delay as a function of VDD

  36. Where Does Power Go in CMOS?

  37. Vdd Vin Vout C L Dynamic Power Dissipation 2 Energy/transition = C * V L dd 2 Power = Energy/transition * f = C * V * f L dd Not a function of transistor sizes! Need to reduce C , V , and f to reduce power. L dd

  38. Impact ofTechnology Scaling

  39. Technology Evolution

  40. Technology Scaling (1) Minimum Feature Size

  41. Technology Scaling (2) Number of components per chip

  42. Propagation Delay Scaling

  43. Technology Scaling Models

  44. Scaling Relationships for Long Channel Devices

  45. Scaling of Short Channel Devices

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